Initial commit

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/br200-wp.c

@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Aerohive BR200-WP Board Setup
+ * Copyright (C) 2023 Pawel Dembicki <paweldembicki@gmail.com>
+ *
+ * Based on:
+ *   hiveap-330.c:
+ *      Aerohive HiveAP-330 Board Setup
+ *      Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+static void __init br200_wp_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init br200_wp_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("br200_wp_setup_arch()", 0);
+
+	fsl_pci_assign_primary();
+
+	pr_info("br200-wp board from Aerohive\n");
+}
+
+machine_arch_initcall(br200_wp, mpc85xx_common_publish_devices);
+
+define_machine(br200_wp) {
+	.name			= "P1020 RDB",
+	.compatible		= "aerohive,br200-wp",
+	.setup_arch		= br200_wp_setup_arch,
+	.init_IRQ		= br200_wp_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/firebox_t10.c

@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Watchguard Firebox T10 Board Setup
+ *
+ * Copyright (C) 2023 David Bauer <mail@david-bauer.net>
+ *
+ * Based on:
+ *   p1010rdb.c:
+ *      P1010 RDB Board Setup
+ *      Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+static void __init firebox_t10_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init firebox_t10_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("firebox_t10_setup_arch()", 0);
+
+	fsl_pci_assign_primary();
+
+	pr_info("Firebox T10 from Watchguard\n");
+}
+
+machine_arch_initcall(firebox_t10, mpc85xx_common_publish_devices);
+
+define_machine(firebox_t10) {
+	.name			= "P1010 RDB",
+	.compatible		= "watchguard,firebox-t10",
+	.setup_arch		= firebox_t10_setup_arch,
+	.init_IRQ		= firebox_t10_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/hiveap-330.c

@@ -0,0 +1,77 @@
+/*
+ * Aerohive HiveAP-330 Board Setup
+ *
+ * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
+ *
+ * Based on:
+ *   mpc85xx_rdb.c:
+ *      MPC85xx RDB Board Setup
+ *      Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+static void __init hiveap_330_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init hiveap_330_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("hiveap_330_setup_arch()", 0);
+
+	mpc85xx_smp_init();
+
+	fsl_pci_assign_primary();
+
+	printk(KERN_INFO "HiveAP-330 board from Aerohive\n");
+}
+
+machine_arch_initcall(hiveap_330, mpc85xx_common_publish_devices);
+
+define_machine(hiveap_330) {
+	.name			= "P1020 RDB",
+	.compatible		= "aerohive,hiveap-330",
+	.setup_arch		= hiveap_330_setup_arch,
+	.init_IRQ		= hiveap_330_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/msm460.c

@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * HPE MSM460 Board Setup
+ *
+ * Copyright (C) 2022 David Bauer <mail@david-bauer.net>
+ *
+ * Based on:
+ *   mpc85xx_rdb.c:
+ *      MPC85xx RDB Board Setup
+ *      Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+static void __init msm_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init msm_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("msm_setup_arch()", 0);
+
+	mpc85xx_smp_init();
+
+	fsl_pci_assign_primary();
+
+	pr_info("MSM460 board from HPE\n");
+}
+
+machine_arch_initcall(msm, mpc85xx_common_publish_devices);
+
+define_machine(msm) {
+	.name			= "P1020 RDB",
+	.compatible		= "hpe,msm460",
+	.setup_arch		= msm_setup_arch,
+	.init_IRQ		= msm_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/panda.c

@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * OCEDO Panda Board Setup
+ *
+ * Copyright (C) 2019 David Bauer <mail@david-bauer.net>
+ *
+ * Based on:
+ *   mpc85xx_rdb.c:
+ *      MPC85xx RDB Board Setup
+ *      Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+static void __init panda_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init panda_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("panda_setup_arch()", 0);
+
+	mpc85xx_smp_init();
+
+	fsl_pci_assign_primary();
+
+	pr_info("Panda board from OCEDO\n");
+}
+
+machine_arch_initcall(panda, mpc85xx_common_publish_devices);
+
+define_machine(panda) {
+	.name			= "P1020 RDB",
+	.compatible		= "ocedo,panda",
+	.setup_arch		= panda_setup_arch,
+	.init_IRQ		= panda_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/red15w_rev1.c

@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Sophos RED 15w Rev.1 Board Setup
+ *
+ * Copyright (C) 2019 David Bauer <mail@david-bauer.net>
+ *
+ * Based on:
+ *   p1010rdb.c:
+ *      P1010 RDB Board Setup
+ *      Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+static void __init red_15w_rev1_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init red_15w_rev1_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("red_15w_rev1_setup_arch()", 0);
+
+	fsl_pci_assign_primary();
+
+	pr_info("RED 15w Rev.1 from Sophos\n");
+}
+
+machine_arch_initcall(red_15w_rev1, mpc85xx_common_publish_devices);
+
+define_machine(red_15w_rev1) {
+	.name			= "P1010 RDB",
+	.compatible		= "sophos,red-15w-rev1",
+	.setup_arch		= red_15w_rev1_setup_arch,
+	.init_IRQ		= red_15w_rev1_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c

@@ -0,0 +1,71 @@
+/*
+ * TL-WDR4900 v1 board setup
+ *
+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on:
+ *   p1010rdb.c:
+ *      P1010RDB Board Setup
+ *      Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+static void __init tl_wdr4900_v1_pic_init(void)
+{
+	struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init tl_wdr4900_v1_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
+
+	fsl_pci_assign_primary();
+
+	printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
+}
+
+machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
+
+define_machine(tl_wdr4900_v1) {
+	.name			= "Freescale P1014",
+	.compatible		= "tplink,tl-wdr4900-v1",
+	.setup_arch		= tl_wdr4900_v1_setup_arch,
+	.init_IRQ		= tl_wdr4900_v1_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/ws-ap3710i.c

@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Enterasys WS-AP3710i Board Setup
+ *
+ * Copyright (C) 2019 David Bauer <mail@david-bauer.net>
+ *
+ * Based on:
+ *   mpc85xx_rdb.c:
+ *      MPC85xx RDB Board Setup
+ *      Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+static void __init ws_ap3710i_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init ws_ap3710i_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("ws_ap3710i_setup_arch()", 0);
+
+	mpc85xx_smp_init();
+
+	fsl_pci_assign_primary();
+
+	pr_info("WS-AP3710i board from Enterasys\n");
+}
+
+machine_arch_initcall(ws_ap3710i, mpc85xx_common_publish_devices);
+
+define_machine(ws_ap3710i) {
+	.name			= "P1020 RDB",
+	.compatible		= "enterasys,ws-ap3710i",
+	.setup_arch		= ws_ap3710i_setup_arch,
+	.init_IRQ		= ws_ap3710i_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/ws-ap3715i.c

@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Enterasys WS-AP3715i Board Setup
+ *
+ * Copyright (C) 2023 David Bauer <mail@david-bauer.net>
+ *
+ * Based on:
+ *   p1010rdb.c:
+ *      P1010 RDB Board Setup
+ *      Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+static void __init wsap3715i_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init wsap3715i_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("wsap3715i_setup_arch()", 0);
+
+	fsl_pci_assign_primary();
+
+	pr_info("WS-AP3715i from Enterasys\n");
+}
+
+machine_arch_initcall(wsap3715i, mpc85xx_common_publish_devices);
+
+define_machine(wsap3715i) {
+	.name			= "P1010 RDB",
+	.compatible		= "enterasys,ws-ap3715i",
+	.setup_arch		= wsap3715i_setup_arch,
+	.init_IRQ		= wsap3715i_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};

target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/ws-ap3825i.c

@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * Extreme Networks WS-AP3825i Board Setup
+ *
+ * Copyright (C) 2021 Martin Kennedy <hurricos@gmail.com>
+ *
+ * Based on:
+ *   mpc85xx_rdb.c:
+ *      MPC85xx RDB Board Setup
+ *      Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+
+#include "mpc85xx.h"
+
+static void __init ws_ap3825i_pic_init(void)
+{
+	struct mpic *mpic;
+
+	mpic = mpic_alloc(NULL, 0,
+	  MPIC_BIG_ENDIAN |
+	  MPIC_SINGLE_DEST_CPU,
+	  0, 256, " OpenPIC  ");
+
+	BUG_ON(mpic == NULL);
+	mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init ws_ap3825i_setup_arch(void)
+{
+	if (ppc_md.progress)
+		ppc_md.progress("ws_ap3825i_setup_arch()", 0);
+
+	mpc85xx_smp_init();
+
+	fsl_pci_assign_primary();
+
+	pr_info("WS-AP3825i board from Extreme Networks\n");
+}
+
+machine_arch_initcall(ws_ap3825i, mpc85xx_common_publish_devices);
+
+define_machine(ws_ap3825i) {
+	.name			= "P1020 RDB",
+	.compatible		= "extreme-networks,ws-ap3825i",
+	.setup_arch		= ws_ap3825i_setup_arch,
+	.init_IRQ		= ws_ap3825i_pic_init,
+#ifdef CONFIG_PCI
+	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
+	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
+#endif
+	.get_irq		= mpic_get_irq,
+	.progress		= udbg_progress,
+};