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This commit is contained in:
@@ -0,0 +1,66 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-3720-uDPU.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Methode eDPU Board";
|
||||
compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
|
||||
};
|
||||
|
||||
/* PHY mode is set to 1000Base-X despite Maxlinear IC being capable of
|
||||
* 2500Base-X since until 5.15 support for mvebu is available trying to
|
||||
* use 2500Base-X will cause buffer overruns for which the fix is not
|
||||
* easily backportable.
|
||||
*/
|
||||
ð0 {
|
||||
phy-mode = "1000base-x";
|
||||
};
|
||||
|
||||
/*
|
||||
* External MV88E6361 switch is only available on v2 of the board.
|
||||
* U-Boot will enable the MDIO bus and switch nodes.
|
||||
*/
|
||||
&mdio {
|
||||
status = "disabled";
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||||
pinctrl-names = "default";
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||||
pinctrl-0 = <&smi_pins>;
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||||
|
||||
/* Actual device is MV88E6361 */
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||||
switch: switch@0 {
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||||
compatible = "marvell,mv88e6190";
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||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
reg = <0>;
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||||
status = "disabled";
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||||
|
||||
ports {
|
||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
|
||||
port@0 {
|
||||
reg = <0>;
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||||
label = "cpu";
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||||
phy-mode = "2500base-x";
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||||
managed = "in-band-status";
|
||||
ethernet = <ð0>;
|
||||
};
|
||||
|
||||
port@9 {
|
||||
reg = <9>;
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||||
label = "downlink";
|
||||
phy-mode = "2500base-x";
|
||||
managed = "in-band-status";
|
||||
};
|
||||
|
||||
port@a {
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||||
reg = <10>;
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||||
label = "uplink";
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||||
phy-mode = "2500base-x";
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||||
managed = "in-band-status";
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sfp = <&sfp_eth1>;
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||||
};
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||||
};
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||||
};
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||||
};
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@@ -0,0 +1,240 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for ESPRESSObin-Ultra
|
||||
* Copyright (C) 2019 Globalscale technologies, Inc.
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*
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* Jason Hung <jhung@globalscaletechnologies.com>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "armada-372x.dtsi"
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/ {
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model = "Globalscale Marvell ESPRESSOBin Ultra Board";
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compatible = "globalscale,espressobin-ultra", "marvell,armada3720",
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"marvell,armada3710";
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||||
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||||
aliases {
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||||
/* for dsa slave device */
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||||
ethernet1 = &switch0port1;
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||||
ethernet2 = &switch0port2;
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ethernet3 = &switch0port3;
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||||
ethernet4 = &switch0port4;
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||||
ethernet5 = &switch0port5;
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||||
};
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||||
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||||
chosen {
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||||
stdout-path = "serial0:115200n8";
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||||
};
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||||
|
||||
memory@0 {
|
||||
device_type = "memory";
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||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
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||||
};
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||||
|
||||
reg_usb3_vbus: usb3-vbus {
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||||
compatible = "regulator-fixed";
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||||
regulator-name = "usb3-vbus";
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||||
regulator-min-microvolt = <5000000>;
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||||
regulator-max-microvolt = <5000000>;
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||||
enable-active-high;
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||||
gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>;
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||||
};
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||||
|
||||
usb3_phy: usb3-phy {
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||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <®_usb3_vbus>;
|
||||
};
|
||||
|
||||
leds {
|
||||
pinctrl-names = "default";
|
||||
compatible = "gpio-leds";
|
||||
/* No assigned functions to the LEDs by default */
|
||||
led1 {
|
||||
label = "ebin-ultra:blue:led1";
|
||||
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led2 {
|
||||
label = "ebin-ultra:green:led2";
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||||
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led3 {
|
||||
label = "ebin-ultra:red:led3";
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||||
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
led4 {
|
||||
label = "ebin-ultra:yellow:led4";
|
||||
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
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||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pcie0 {
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||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
non-removable;
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
marvell,pad-type = "fixed-1-8v";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_quad_pins>;
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||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <108000000>;
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||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <4>;
|
||||
m25p,fast-read;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x0 0x3e0000>;
|
||||
};
|
||||
partition@3e0000 {
|
||||
label = "hw-info";
|
||||
reg = <0x3e0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
clock-frequency = <100000>;
|
||||
|
||||
rtc@51 {
|
||||
compatible = "nxp,pcf8563";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
usb-phy = <&usb3_phy>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmii_pins>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio {
|
||||
status = "okay";
|
||||
|
||||
extphy: ethernet-phy@0 {
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
switch0: switch0@1 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
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||||
reg = <3>;
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||||
|
||||
dsa,member = <0 0>;
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||||
|
||||
ports {
|
||||
#address-cells = <1>;
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||||
#size-cells = <0>;
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||||
|
||||
switch0port0: port@0 {
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||||
reg = <0>;
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||||
ethernet = <ð0>;
|
||||
};
|
||||
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||||
switch0port1: port@1 {
|
||||
reg = <1>;
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||||
label = "lan0";
|
||||
phy-handle = <&switch0phy1>;
|
||||
};
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||||
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||||
switch0port2: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
phy-handle = <&switch0phy2>;
|
||||
};
|
||||
|
||||
switch0port3: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
phy-handle = <&switch0phy3>;
|
||||
};
|
||||
|
||||
switch0port4: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan3";
|
||||
phy-handle = <&switch0phy4>;
|
||||
};
|
||||
|
||||
switch0port5: port@5 {
|
||||
reg = <5>;
|
||||
label = "wan";
|
||||
phy-handle = <&extphy>;
|
||||
phy-mode = "sgmii";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0phy1: switch0phy1@11 {
|
||||
reg = <0x11>;
|
||||
};
|
||||
switch0phy2: switch0phy2@12 {
|
||||
reg = <0x12>;
|
||||
};
|
||||
switch0phy3: switch0phy3@13 {
|
||||
reg = <0x13>;
|
||||
};
|
||||
switch0phy4: switch0phy4@14 {
|
||||
reg = <0x14>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,249 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include "armada-372x.dtsi"
|
||||
|
||||
/ {
|
||||
model = "GL.iNet GL-MV1000";
|
||||
compatible = "glinet,gl-mv1000", "marvell,armada3720";
|
||||
|
||||
aliases {
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_power;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_power;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
vcc_sd_reg1: regulator {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "vcc_sd1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
|
||||
gpios-states = <0>;
|
||||
states = <1800000 0x1
|
||||
3300000 0x0>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
switch {
|
||||
label = "switch";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&gpiosb 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
vpn {
|
||||
label = "green:vpn";
|
||||
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
wan {
|
||||
function = LED_FUNCTION_WAN;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led_power: power {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
reg = <0>;
|
||||
compatible = "jedec,spi-nor";
|
||||
spi-max-frequency = <104000000>;
|
||||
m25p,fast-read;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0 0xf0000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@f0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0xf0000 0x8000>;
|
||||
};
|
||||
|
||||
factory: partition@f8000 {
|
||||
label = "factory";
|
||||
reg = <0xf8000 0x8000>;
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_factory_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
|
||||
macaddr_factory_6: macaddr@6 {
|
||||
reg = <0x6 0x6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "gl-firmware-dtb";
|
||||
reg = <0x100000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@110000 {
|
||||
label = "gl-firmware";
|
||||
reg = <0x110000 0xef0000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@ef0000 {
|
||||
label = "gl-firmware-jffs2";
|
||||
reg = <0xef0000 0x110000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
wp-inverted;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpionb 17 GPIO_ACTIVE_LOW>;
|
||||
marvell,pad-type = "sd";
|
||||
no-1-8-v;
|
||||
vqmmc-supply = <&vcc_sd_reg1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
marvell,pad-type = "fixed-1-8v";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio {
|
||||
switch0: switch0@1 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
dsa,member = <0 0>;
|
||||
|
||||
ports: ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
ethernet = <ð0>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "wan";
|
||||
phy-handle = <&switch0phy0>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan0";
|
||||
phy-handle = <&switch0phy1>;
|
||||
|
||||
nvmem-cells = <&macaddr_factory_6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan1";
|
||||
phy-handle = <&switch0phy2>;
|
||||
|
||||
nvmem-cells = <&macaddr_factory_6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0phy0: switch0phy0@11 {
|
||||
reg = <0x11>;
|
||||
};
|
||||
switch0phy1: switch0phy1@12 {
|
||||
reg = <0x12>;
|
||||
};
|
||||
switch0phy2: switch0phy2@13 {
|
||||
reg = <0x13>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
nvmem-cells = <&macaddr_factory_0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
phy-mode = "rgmii-id";
|
||||
status = "okay";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,46 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-3720-uDPU.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Methode uDPU Board";
|
||||
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
|
||||
|
||||
sfp_eth0: sfp-eth0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c0>;
|
||||
los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <3000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_nb {
|
||||
i2c1_recovery_pins: i2c1-recovery-pins {
|
||||
groups = "i2c1";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "recovery";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
pinctrl-1 = <&i2c1_recovery_pins>;
|
||||
/delete-property/mrvl,i2c-fast-mode;
|
||||
scl-gpios = <&gpionb 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpionb 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
};
|
||||
|
||||
ð0 {
|
||||
phy-mode = "2500base-x";
|
||||
sfp = <&sfp_eth0>;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy-mode = "2500base-x";
|
||||
};
|
||||
@@ -0,0 +1,165 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device tree for the uDPU board.
|
||||
* Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
|
||||
* Copyright (C) 2016 Marvell
|
||||
* Copyright (C) 2019 Methode Electronics
|
||||
* Copyright (C) 2019 Telus
|
||||
*
|
||||
* Vladimir Vid <vladimir.vid@sartura.hr>
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-372x.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
ethernet0 = ð0;
|
||||
ethernet1 = ð1;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-power1 {
|
||||
label = "udpu:green:power";
|
||||
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-power2 {
|
||||
label = "udpu:red:power";
|
||||
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-network1 {
|
||||
label = "udpu:green:network";
|
||||
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-network2 {
|
||||
label = "udpu:red:network";
|
||||
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-alarm1 {
|
||||
label = "udpu:green:alarm";
|
||||
gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
led-alarm2 {
|
||||
label = "udpu:red:alarm";
|
||||
gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
sfp_eth1: sfp-eth1 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&i2c1>;
|
||||
los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <3000>;
|
||||
};
|
||||
};
|
||||
|
||||
&sdhci0 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
marvell,pad-type = "fixed-1-8v";
|
||||
non-removable;
|
||||
no-sd;
|
||||
no-sdio;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_quad_pins>;
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <54000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "firmware";
|
||||
reg = <0x0 0x180000>;
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x180000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_nb {
|
||||
i2c2_recovery_pins: i2c2-recovery-pins {
|
||||
groups = "i2c2";
|
||||
function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "recovery";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
pinctrl-1 = <&i2c2_recovery_pins>;
|
||||
/delete-property/mrvl,i2c-fast-mode;
|
||||
scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
|
||||
|
||||
temp-sensor@48 {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
temp-sensor@49 {
|
||||
compatible = "ti,tmp75c";
|
||||
reg = <0x49>;
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
managed = "in-band-status";
|
||||
phys = <&comphy1 0>;
|
||||
};
|
||||
|
||||
ð1 {
|
||||
phy-mode = "sgmii";
|
||||
status = "okay";
|
||||
managed = "in-band-status";
|
||||
phys = <&comphy0 1>;
|
||||
sfp = <&sfp_eth1>;
|
||||
};
|
||||
|
||||
&usb3 {
|
||||
status = "okay";
|
||||
phys = <&usb2_utmi_otg_phy>;
|
||||
phy-names = "usb2-utmi-otg-phy";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -0,0 +1,448 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/*
|
||||
* Device Tree file for Globalscale MOCHAbin
|
||||
* Copyright (C) 2019 Globalscale technologies, Inc.
|
||||
* Copyright (C) 2021 Sartura Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include "armada-7040.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Globalscale MOCHAbin";
|
||||
compatible = "globalscale,mochabin", "marvell,armada7040",
|
||||
"marvell,armada-ap806-quad", "marvell,armada-ap806";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
ethernet3 = &swport1;
|
||||
ethernet4 = &swport2;
|
||||
ethernet5 = &swport3;
|
||||
ethernet6 = &swport4;
|
||||
};
|
||||
|
||||
/* SFP+ 10G */
|
||||
sfp_eth0: sfp-eth0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c1>;
|
||||
los-gpio = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&sfp_gpio 2 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&sfp_gpio 1 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&sfp_gpio 0 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
/* SFP 1G */
|
||||
sfp_eth2: sfp-eth2 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c0>;
|
||||
los-gpio = <&sfp_gpio 7 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&sfp_gpio 6 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&sfp_gpio 5 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&sfp_gpio 4 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
/* microUSB UART console */
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
/* eMMC */
|
||||
&ap_sdhci0 {
|
||||
status = "okay";
|
||||
|
||||
bus-width = <4>;
|
||||
non-removable;
|
||||
/delete-property/ marvell,xenon-phy-slow-mode;
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
&cp0_pinctrl {
|
||||
cp0_uart0_pins: cp0-uart0-pins {
|
||||
marvell,pins = "mpp6", "mpp7";
|
||||
marvell,function = "uart0";
|
||||
};
|
||||
|
||||
cp0_spi0_pins: cp0-spi0-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58", "mpp59";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
cp0_spi1_pins: cp0-spi1-pins {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp2", "mpp3";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
pca9554_int_pins: pca9554-int-pins {
|
||||
marvell,pins = "mpp27";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_rgmii1_pins: cp0-rgmii1-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52", "mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
is31_sdb_pins: is31-sdb-pins {
|
||||
marvell,pins = "mpp30";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_pcie_reset_pins: cp0-pcie-reset-pins {
|
||||
marvell,pins = "mpp9";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_switch_pins: cp0-switch-pins {
|
||||
marvell,pins = "mpp0", "mpp1";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_phy_pins: cp0-phy-pins {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
|
||||
/* mikroBUS UART */
|
||||
&cp0_uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_uart0_pins>;
|
||||
};
|
||||
|
||||
/* mikroBUS SPI */
|
||||
&cp0_spi0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi0_pins>;
|
||||
};
|
||||
|
||||
/* SPI-NOR */
|
||||
&cp0_spi1{
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi1_pins>;
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x3e0000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3e0000 {
|
||||
label = "hw-info";
|
||||
reg = <0x3e0000 0x10000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@3f0000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* mikroBUS, 1G SFP and GPIO expander */
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
sfp_gpio: pca9554@39 {
|
||||
compatible = "nxp,pca9554";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pca9554_int_pins>;
|
||||
reg = <0x39>;
|
||||
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
/*
|
||||
* IO0_0: SFP+_TX_FAULT
|
||||
* IO0_1: SFP+_TX_DISABLE
|
||||
* IO0_2: SFP+_PRSNT
|
||||
* IO0_3: SFP+_LOSS
|
||||
* IO0_4: SFP_TX_FAULT
|
||||
* IO0_5: SFP_TX_DISABLE
|
||||
* IO0_6: SFP_PRSNT
|
||||
* IO0_7: SFP_LOSS
|
||||
*/
|
||||
};
|
||||
};
|
||||
|
||||
/* IS31FL3199, mini-PCIe and 10G SFP+ */
|
||||
&cp0_i2c1 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c1_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
leds@64 {
|
||||
compatible = "issi,is31fl3199";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&is31_sdb_pins>;
|
||||
shutdown-gpios = <&cp0_gpio1 30 GPIO_ACTIVE_HIGH>;
|
||||
reg = <0x64>;
|
||||
|
||||
led1_red: led@1 {
|
||||
label = "red:led1";
|
||||
reg = <1>;
|
||||
led-max-microamp = <20000>;
|
||||
};
|
||||
|
||||
led1_green: led@2 {
|
||||
label = "green:led1";
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
led1_blue: led@3 {
|
||||
label = "blue:led1";
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
led2_red: led@4 {
|
||||
label = "red:led2";
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
led2_green: led@5 {
|
||||
label = "green:led2";
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
led2_blue: led@6 {
|
||||
label = "blue:led2";
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
led3_red: led@7 {
|
||||
label = "red:led3";
|
||||
reg = <7>;
|
||||
};
|
||||
|
||||
led3_green: led@8 {
|
||||
label = "green:led3";
|
||||
reg = <8>;
|
||||
};
|
||||
|
||||
led3_blue: led@9 {
|
||||
label = "blue:led3";
|
||||
reg = <9>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
/* 88E1512 PHY */
|
||||
eth2phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
sfp = <&sfp_eth2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_phy_pins>;
|
||||
reset-gpios = <&cp0_gpio1 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* 88E6141 Topaz switch */
|
||||
switch: switch@3 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_switch_pins>;
|
||||
reset-gpios = <&cp0_gpio1 0 GPIO_ACTIVE_LOW>;
|
||||
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swport1: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan0";
|
||||
phy-handle = <&swphy1>;
|
||||
};
|
||||
|
||||
swport2: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan1";
|
||||
phy-handle = <&swphy2>;
|
||||
};
|
||||
|
||||
swport3: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
phy-handle = <&swphy3>;
|
||||
};
|
||||
|
||||
swport4: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan3";
|
||||
phy-handle = <&swphy4>;
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
ethernet = <&cp0_eth1>;
|
||||
phy-mode = "2500base-x";
|
||||
managed = "in-band-status";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
swphy1: swphy1@17 {
|
||||
reg = <17>;
|
||||
};
|
||||
|
||||
swphy2: swphy2@18 {
|
||||
reg = <18>;
|
||||
};
|
||||
|
||||
swphy3: swphy3@19 {
|
||||
reg = <19>;
|
||||
};
|
||||
|
||||
swphy4: swphy4@20 {
|
||||
reg = <20>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* 10G SFP+ */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "10gbase-r";
|
||||
phys = <&cp0_comphy4 0>;
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp_eth0>;
|
||||
};
|
||||
|
||||
/* Topaz switch uplink */
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy0 1>;
|
||||
|
||||
fixed-link {
|
||||
speed = <2500>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* 1G SFP or 1G RJ45 */
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_rgmii1_pins>;
|
||||
|
||||
phy = <ð2phy>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
|
||||
/* SMSC USB5434B hub */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
|
||||
phys = <&cp0_comphy1 0>;
|
||||
phy-names = "cp0-usb3h0-comphy";
|
||||
};
|
||||
|
||||
/* miniPCI-E USB */
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_sata0 {
|
||||
status = "okay";
|
||||
|
||||
/* 7 + 12 SATA connector (J24) */
|
||||
sata-port@0 {
|
||||
phys = <&cp0_comphy2 0>;
|
||||
phy-names = "cp0-sata0-0-phy";
|
||||
};
|
||||
|
||||
/* M.2-2250 B-key (J39) */
|
||||
sata-port@1 {
|
||||
phys = <&cp0_comphy3 1>;
|
||||
phy-names = "cp0-sata0-1-phy";
|
||||
};
|
||||
};
|
||||
|
||||
/* miniPCI-E (J5) */
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_pcie_reset_pins>;
|
||||
phys = <&cp0_comphy5 2>;
|
||||
phy-names = "cp0-pcie2-x1-phy";
|
||||
reset-gpio = <&cp0_gpio1 9 GPIO_ACTIVE_LOW>;
|
||||
ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x8000000>;
|
||||
};
|
||||
@@ -0,0 +1,403 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "armada-7040.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "MikroTik RB5009";
|
||||
compatible = "mikrotik,rb5009", "marvell,armada7040",
|
||||
"marvell,armada-ap806-quad", "marvell,armada-ap806";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x40000000>;
|
||||
};
|
||||
|
||||
aliases {
|
||||
led-boot = &led_user;
|
||||
led-failsafe = &led_user;
|
||||
led-running = &led_user;
|
||||
led-upgrade = &led_user;
|
||||
label-mac-device = &p1;
|
||||
};
|
||||
|
||||
usb3_vbus: regulator-usb3-vbus0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "usb3_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&cp0_gpio2 23 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
reg_leds: regulator-leds {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "LED-power";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpio = <&cp0_gpio2 27 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
output-led-power {
|
||||
compatible = "regulator-output";
|
||||
vout-supply = <®_leds>;
|
||||
};
|
||||
|
||||
sfp_i2c: sfp-i2c {
|
||||
compatible = "i2c-gpio";
|
||||
sda-gpios = <&cp0_gpio1 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
scl-gpios = <&cp0_gpio1 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
gpios = <&cp0_gpio1 28 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <KEY_RESTART>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_user: user {
|
||||
function = "user";
|
||||
gpios = <&cp0_gpio2 26 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
};
|
||||
|
||||
sfp {
|
||||
function = "sfp";
|
||||
gpios = <&cp0_gpio2 25 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
};
|
||||
|
||||
hdr1 {
|
||||
function = "hdr1";
|
||||
gpios = <&cp0_gpio1 4 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
};
|
||||
|
||||
hdr2 {
|
||||
function = "hdr2";
|
||||
gpios = <&cp0_gpio2 19 GPIO_ACTIVE_LOW>;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
};
|
||||
};
|
||||
|
||||
sfp: sfp {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&sfp_i2c>;
|
||||
mod-def0-gpios = <&cp0_gpio1 11 GPIO_ACTIVE_LOW>;
|
||||
los-gpios = <&cp0_gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpios = <&cp0_gpio1 6 GPIO_ACTIVE_HIGH>;
|
||||
tx-disable-gpios = <&cp0_gpio1 5 GPIO_ACTIVE_HIGH>;
|
||||
rate-select0-gpios = <&cp0_gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
compatible = "mikrotik,routerboot-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
label = "MikroTik";
|
||||
reg = <0x0 0xfe0000>;
|
||||
|
||||
hard_config: hard_config {
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "mikrotik,routerboot-nvmem";
|
||||
|
||||
macaddr_hard: base-mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soft_config {
|
||||
};
|
||||
|
||||
dtb_config {
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
partition@b0000 {
|
||||
label = "RouterBOOT-primary";
|
||||
reg = <0xb0000 0x10000>;
|
||||
};
|
||||
|
||||
/* Empty space on NOR repurposed for U-Boot environment */
|
||||
partition@fe0000 {
|
||||
compatible = "u-boot,env";
|
||||
label = "u-boot-env";
|
||||
reg = <0xfe0000 0x20000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_nand_controller {
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-rb = <0>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "YAFFS";
|
||||
reg = <0x0 0x800000>;
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
label = "ubi";
|
||||
reg = <0x800000 0x3f800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_comphy3 {
|
||||
connector {
|
||||
compatible = "usb-a-connector";
|
||||
phy-supply = <&usb3_vbus>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy3 1>, <&cp0_utmi1>;
|
||||
phy-names = "cp0-usb3h1-comphy", "utmi";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_eth0 {
|
||||
/* This port is connected to 88E6393X switch */
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-r";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
managed = "in-band-status";
|
||||
nvmem-cells = <&macaddr_hard 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
switch@0 {
|
||||
/* Actual device is MV88E6393X */
|
||||
compatible = "marvell,mv88e6190";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
/* LED config is lost if switch is reset */
|
||||
//reset-gpios = <&cp0_gpio2 2 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "cpu";
|
||||
ethernet = <&cp0_eth0>;
|
||||
phy-mode = "10gbase-r";
|
||||
managed = "in-band-status";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "p8";
|
||||
phy-handle = <&switch0phy1>;
|
||||
nvmem-cells = <&macaddr_hard 7>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "p7";
|
||||
phy-handle = <&switch0phy2>;
|
||||
nvmem-cells = <&macaddr_hard 6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "p6";
|
||||
phy-handle = <&switch0phy3>;
|
||||
nvmem-cells = <&macaddr_hard 5>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "p5";
|
||||
phy-handle = <&switch0phy4>;
|
||||
nvmem-cells = <&macaddr_hard 4>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "p4";
|
||||
phy-handle = <&switch0phy5>;
|
||||
nvmem-cells = <&macaddr_hard 3>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "p3";
|
||||
phy-handle = <&switch0phy6>;
|
||||
nvmem-cells = <&macaddr_hard 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@7 {
|
||||
reg = <7>;
|
||||
label = "p2";
|
||||
phy-handle = <&switch0phy7>;
|
||||
nvmem-cells = <&macaddr_hard 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
p1: port@9 {
|
||||
reg = <9>;
|
||||
label = "p1";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&qca8081>;
|
||||
managed = "in-band-status";
|
||||
nvmem-cells = <&macaddr_hard 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
port@a {
|
||||
reg = <10>;
|
||||
label = "sfp";
|
||||
phy-mode = "10gbase-r";
|
||||
managed = "in-band-status";
|
||||
sfp = <&sfp>;
|
||||
nvmem-cells = <&macaddr_hard 8>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
|
||||
mdio {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0phy1: switch0phy1@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
switch0phy2: switch0phy2@2 {
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
switch0phy3: switch0phy3@3 {
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
switch0phy4: switch0phy4@4 {
|
||||
reg = <0x4>;
|
||||
};
|
||||
|
||||
switch0phy5: switch0phy5@5 {
|
||||
reg = <0x5>;
|
||||
};
|
||||
|
||||
switch0phy6: switch0phy6@6 {
|
||||
reg = <0x6>;
|
||||
};
|
||||
|
||||
switch0phy7: switch0phy7@7 {
|
||||
reg = <0x7>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio1 {
|
||||
compatible = "marvell,mv88e6xxx-mdio-external";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
qca8081: qca8081@0 {
|
||||
reg = <0>;
|
||||
|
||||
leds {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_WAN;
|
||||
default-state = "keep";
|
||||
active-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,513 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright SolidRun Ltd.
|
||||
* Copyright (C) 2024 Tobias Schramm <tobias@t-sys.eu>
|
||||
*
|
||||
* Device tree for the CN9130-based ClearFog Pro
|
||||
*/
|
||||
|
||||
#include "cn9130.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
model = "SolidRun ClearFog Pro";
|
||||
compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad",
|
||||
"marvell,armada-ap807";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
gpio1 = &cp0_gpio1;
|
||||
gpio2 = &cp0_gpio2;
|
||||
i2c0 = &cp0_i2c0;
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
spi1 = &cp0_spi1;
|
||||
};
|
||||
|
||||
memory@00000000 {
|
||||
reg = <0x0 0x0 0x1 0x0>;
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
/* Virtual regulator, root of power tree */
|
||||
vin: regulator-vin {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vin";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
/* Regulators supplied by vin */
|
||||
v_5v0: regulator-v_5v0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_5v0";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&vin>;
|
||||
};
|
||||
|
||||
v_3v3: regulator-v_3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_3v3";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vin>;
|
||||
};
|
||||
|
||||
/* Regulators supplied by v_5v0 */
|
||||
v_1v8: regulator-v_1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_1v8";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&v_5v0>;
|
||||
};
|
||||
|
||||
v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "v_5v0_usb3_hst_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpios = <&expander0 6 GPIO_ACTIVE_LOW>;
|
||||
vin-supply = <&v_5v0>;
|
||||
};
|
||||
|
||||
/* Regulators internal to SOM */
|
||||
vqmmc: regulator-vqmmc {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vqmmc";
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vin-supply = <&v_5v0>;
|
||||
};
|
||||
|
||||
cp0_usb3_0_phy1: cp0_usb3_phy@1 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vbus-supply = <&v_5v0_usb3_hst_vbus>;
|
||||
};
|
||||
|
||||
cp0_sfp_eth0: sfp-eth@0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp0_i2c1>;
|
||||
los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
|
||||
maximum-power-milliwatt = <2000>;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_button_pin>;
|
||||
|
||||
reset {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* on-board eMMC */
|
||||
&ap_sdhci0 {
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
vqmmc-supply = <&vqmmc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
|
||||
/*
|
||||
* PCA9655 GPIO expander, up to 1MHz clock.
|
||||
* 0-CON3 CLKREQ#
|
||||
* 1-CON3 PERST#
|
||||
* 2-CON2 PERST#
|
||||
* 3-CON3 W_DISABLE
|
||||
* 4-CON2 CLKREQ#
|
||||
* 5-USB3 overcurrent
|
||||
* 6-USB3 power
|
||||
* 7-CON2 W_DISABLE
|
||||
* 8-JP4 P1
|
||||
* 9-JP4 P4
|
||||
* 10-JP4 P5
|
||||
* 11-m.2 DEVSLP
|
||||
* 12-SFP_LOS
|
||||
* 13-SFP_TX_FAULT
|
||||
* 14-SFP_TX_DISABLE
|
||||
* 15-SFP_MOD_DEF0
|
||||
*/
|
||||
expander0: gpio-expander@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_expander0_pins>;
|
||||
vcc-supply = <&v_3v3>;
|
||||
|
||||
pcie1_0_clkreq {
|
||||
gpio-hog;
|
||||
gpios = <0 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "pcie1.0-clkreq";
|
||||
};
|
||||
|
||||
pcie1_0_w_disable {
|
||||
gpio-hog;
|
||||
gpios = <3 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "pcie1.0-w-disable";
|
||||
};
|
||||
|
||||
pcie2_0_clkreq {
|
||||
gpio-hog;
|
||||
gpios = <4 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "pcie2.0-clkreq";
|
||||
};
|
||||
|
||||
pcie2_0_w_disable {
|
||||
gpio-hog;
|
||||
gpios = <7 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "pcie2.0-w-disable";
|
||||
};
|
||||
|
||||
usb3_ilimit {
|
||||
gpio-hog;
|
||||
gpios = <5 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "usb3-current-limit";
|
||||
};
|
||||
|
||||
m2_devslp {
|
||||
gpio-hog;
|
||||
gpios = <11 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
line-name = "m.2 devslp";
|
||||
};
|
||||
};
|
||||
|
||||
/* ADC only for mikroBUS connector */
|
||||
mcp3021@4c {
|
||||
compatible = "microchip,mcp3021";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
|
||||
/* EEPROM on the SOM */
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <16>;
|
||||
read-only;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "onie,tlv-layout";
|
||||
|
||||
onie_tlv_macaddr: mac-address {
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* SMBUS on mini PCIe sockets */
|
||||
&cp0_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c1_pins>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp0_mdio {
|
||||
status = "okay";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0>;
|
||||
/* Green led blinks on activity, orange LED on link */
|
||||
marvell,reg-init = <3 16 0 0x0064>;
|
||||
};
|
||||
|
||||
switch@4 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
reg = <4>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-parent = <&cp0_gpio1>;
|
||||
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_dsa0_pins>;
|
||||
reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>;
|
||||
|
||||
mdio-external {
|
||||
compatible = "marvell,mv88e6xxx-mdio-external";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
/* 88E1512 PHY */
|
||||
port6_phy: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan5";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
ethernet = <&cp0_eth1>;
|
||||
label = "cpu";
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
port@6 {
|
||||
/* 88E1512 external phy */
|
||||
reg = <6>;
|
||||
label = "lan6";
|
||||
phy-handle = <&port6_phy>;
|
||||
phy-mode = "rgmii-id";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* SRDS #0 - SATA on bottom M.2 B-Key connector */
|
||||
&cp0_sata0 {
|
||||
status = "okay";
|
||||
|
||||
sata-port@0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
sata-port@1 {
|
||||
phys = <&cp0_comphy0 1>;
|
||||
target-supply = <&v_3v3>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_utmi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */
|
||||
&cp0_usb3_0 {
|
||||
status = "okay";
|
||||
phys = <&cp0_utmi0>;
|
||||
phy-names = "utmi";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
/* SRDS #1 - USB-A 3.0 host port */
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_utmi1>, <&cp0_comphy1 0>;
|
||||
phy-names = "utmi", "usb";
|
||||
usb-phy = <&cp0_usb3_0_phy1>;
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
/* SRDS #2 - SFP+ 10GE */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-r";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
managed = "in-band-status";
|
||||
nvmem-cells = <&onie_tlv_macaddr 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
sfp = <&cp0_sfp_eth0>;
|
||||
};
|
||||
|
||||
/* SRDS #3 - SGMII 1GE to L2 switch */
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy3 1>;
|
||||
phy-mode = "sgmii";
|
||||
nvmem-cells = <&onie_tlv_macaddr 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
/* SRDS #4 - mini PCIe slot near SOM */
|
||||
&cp0_pcie1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
num-lanes = <1>;
|
||||
reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* SRDS #5 - mini PCIe slot far from SOM */
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy5 2>;
|
||||
num-lanes = <1>;
|
||||
reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/* GE PHY RGMII */
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_ge2_rgmii_pins>;
|
||||
phy = <&phy0>;
|
||||
phy-mode = "rgmii-id";
|
||||
nvmem-cells = <&onie_tlv_macaddr 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
/* micro SD card slot */
|
||||
&cp0_sdhci0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
|
||||
no-1-8-v;
|
||||
vqmmc-supply = <&v_3v3>;
|
||||
vmmc-supply = <&v_3v3>;
|
||||
};
|
||||
|
||||
&cp0_spi1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi1_pins>;
|
||||
|
||||
spi-flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
spi-max-frequency = <10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
|
||||
cp0_i2c0_pins: cp0-i2c0-pins {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
|
||||
cp0_i2c1_pins: cp0-i2c1-pins {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
|
||||
cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
|
||||
cp0_sdhci_cd_pins: cp0-sdhci-cd-pins {
|
||||
marvell,pins = "mpp43";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
cp0_sdhci_pins: cp0-sdhci-pins {
|
||||
marvell,pins = "mpp56", "mpp57", "mpp58",
|
||||
"mpp59", "mpp60", "mpp61";
|
||||
marvell,function = "sdio";
|
||||
};
|
||||
|
||||
cp0_spi1_pins: cp0-spi1-pins {
|
||||
marvell,pins = "mpp12", "mpp13", "mpp14",
|
||||
"mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
|
||||
cp0_dsa0_pins: cp0-dsa0-pins {
|
||||
marvell,pins = "mpp27", "mpp29";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_button_pin: cp0-button-pin {
|
||||
marvell,pins = "mpp32";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
cp0_expander0_pins: cp0-expander0-pins {
|
||||
marvell,pins = "mpp4";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,447 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2019 Marvell International Ltd.
|
||||
*
|
||||
* Device tree for the CN9131-DB board.
|
||||
*/
|
||||
|
||||
#include "cn9130.dtsi"
|
||||
#include "puzzle-thermal.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "iEi Puzzle-M901";
|
||||
compatible = "iei,puzzle-m901",
|
||||
"marvell,armada-ap807-quad", "marvell,armada-ap807";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
i2c0 = &cp1_i2c0;
|
||||
i2c1 = &cp0_i2c0;
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
ethernet3 = &cp1_eth0;
|
||||
ethernet4 = &cp1_eth1;
|
||||
ethernet5 = &cp1_eth2;
|
||||
gpio1 = &cp0_gpio1;
|
||||
gpio2 = &cp0_gpio2;
|
||||
gpio3 = &cp1_gpio1;
|
||||
gpio4 = &cp1_gpio2;
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_info;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_info;
|
||||
};
|
||||
|
||||
memory@00000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
chassis0-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 0>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
chassis1-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 1>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy0-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy1-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy2-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy2, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy0-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy1-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy2-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy2, &chassis_fan_group0);
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_uart0 {
|
||||
status = "okay";
|
||||
|
||||
puzzle-mcu {
|
||||
compatible = "iei,wt61p803-puzzle";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
current-speed = <115200>;
|
||||
enable-beep;
|
||||
status = "okay";
|
||||
|
||||
leds {
|
||||
compatible = "iei,wt61p803-puzzle-leds";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
label = "white:network";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
label = "green:cloud";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_info: led@2 {
|
||||
reg = <2>;
|
||||
label = "orange:info";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_power: led@3 {
|
||||
reg = <3>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
active-low;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
puzzle_hwmon: hwmon {
|
||||
compatible = "iei,wt61p803-puzzle-hwmon";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
||||
chassis_fan_group0: fan-group@0 {
|
||||
#cooling-cells = <2>;
|
||||
reg = <0x00>;
|
||||
cooling-levels = <0 159 195 211 223 241 255>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* on-board eMMC - U9 */
|
||||
&ap_sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
};
|
||||
|
||||
&cp0_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_xmdio {
|
||||
status = "okay";
|
||||
cp0_nbaset_phy0: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy2: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON9 */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
phy = <&cp0_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
phy = <&cp0_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy5 2>;
|
||||
phy = <&cp0_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
rtc@32 {
|
||||
compatible = "epson,rx8130";
|
||||
reg = <0x32>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON6 */
|
||||
&cp0_pcie0 {
|
||||
status = "okay";
|
||||
num-lanes = <2>;
|
||||
num-viewport = <8>;
|
||||
phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>;
|
||||
};
|
||||
|
||||
/* U55 */
|
||||
&cp0_spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi0_pins>;
|
||||
reg = <0x700680 0x50>, /* control */
|
||||
<0x2000000 0x1000000>; /* CS0 */
|
||||
status = "okay";
|
||||
spi-flash@0 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x1f0000>;
|
||||
};
|
||||
partition@1f0000 {
|
||||
label = "U-Boot ENV Factory";
|
||||
reg = <0x1f0000 0x10000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "Reserved";
|
||||
reg = <0x200000 0x1f0000>;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "U-Boot ENV";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp0_i2c0_pins: cp0-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp0_i2c1_pins: cp0-i2c-pins-1 {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
|
||||
marvell,pins = "mpp0", "mpp1", "mpp2",
|
||||
"mpp3", "mpp4", "mpp5",
|
||||
"mpp6", "mpp7", "mpp8",
|
||||
"mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
cp0_spi0_pins: cp0-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Instantiate the first connected CP115
|
||||
*/
|
||||
|
||||
#define CP11X_NAME cp1
|
||||
#define CP11X_BASE f6000000
|
||||
#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
|
||||
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
|
||||
#define CP11X_PCIE0_BASE f6600000
|
||||
#define CP11X_PCIE1_BASE f6620000
|
||||
#define CP11X_PCIE2_BASE f6640000
|
||||
|
||||
#include "armada-cp115.dtsi"
|
||||
|
||||
#undef CP11X_NAME
|
||||
#undef CP11X_BASE
|
||||
#undef CP11X_PCIEx_MEM_BASE
|
||||
#undef CP11X_PCIEx_MEM_SIZE
|
||||
#undef CP11X_PCIE0_BASE
|
||||
#undef CP11X_PCIE1_BASE
|
||||
#undef CP11X_PCIE2_BASE
|
||||
|
||||
&cp1_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_xmdio {
|
||||
status = "okay";
|
||||
cp1_nbaset_phy0: ethernet-phy@3 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy1: ethernet-phy@4 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy2: ethernet-phy@5 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON50 */
|
||||
&cp1_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy2 0>;
|
||||
phy = <&cp1_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp1_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy4 1>;
|
||||
phy = <&cp1_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy5 2>;
|
||||
phy = <&cp1_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp1_sata0 {
|
||||
status = "okay";
|
||||
sata-port@1 {
|
||||
status = "okay";
|
||||
phys = <&cp1_comphy0 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp1_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp1_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp1_syscon0 {
|
||||
cp1_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp1_i2c0_pins: cp1-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp1_spi0_pins: cp1-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
|
||||
marvell,pins = "mpp3";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
cp1_sfp_pins: sfp-pins {
|
||||
marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp1_comphy3 1>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
@@ -0,0 +1,631 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
|
||||
/*
|
||||
* Copyright (C) 2019 Marvell International Ltd.
|
||||
*
|
||||
* Device tree for the CN9132-DB board.
|
||||
*/
|
||||
|
||||
#include "cn9130.dtsi"
|
||||
#include "puzzle-thermal.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
model = "iEi Puzzle-M902";
|
||||
compatible = "iei,puzzle-m902",
|
||||
"marvell,armada-ap807-quad", "marvell,armada-ap807";
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
aliases {
|
||||
i2c0 = &cp1_i2c0;
|
||||
i2c1 = &cp0_i2c0;
|
||||
gpio1 = &cp0_gpio1;
|
||||
gpio2 = &cp0_gpio2;
|
||||
gpio3 = &cp1_gpio1;
|
||||
gpio4 = &cp1_gpio2;
|
||||
gpio5 = &cp2_gpio1;
|
||||
gpio6 = &cp2_gpio2;
|
||||
ethernet0 = &cp0_eth0;
|
||||
ethernet1 = &cp0_eth1;
|
||||
ethernet2 = &cp0_eth2;
|
||||
ethernet3 = &cp1_eth0;
|
||||
ethernet4 = &cp1_eth1;
|
||||
ethernet5 = &cp1_eth2;
|
||||
ethernet6 = &cp2_eth0;
|
||||
ethernet7 = &cp2_eth1;
|
||||
ethernet8 = &cp2_eth2;
|
||||
spi1 = &cp0_spi0;
|
||||
spi2 = &cp0_spi1;
|
||||
led-boot = &led_power;
|
||||
led-failsafe = &led_info;
|
||||
led-running = &led_power;
|
||||
led-upgrade = &led_info;
|
||||
};
|
||||
|
||||
memory@00000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0 0x0 0x80000000>;
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "Reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "cp2-xhci0-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpios = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
cp2_usb3_0_phy0: cp2_usb3_phy0 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <&cp2_reg_usb3_vbus0>;
|
||||
};
|
||||
|
||||
cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "cp2-xhci1-vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpios = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
cp2_usb3_0_phy1: cp2_usb3_phy1 {
|
||||
compatible = "usb-nop-xceiv";
|
||||
vcc-supply = <&cp2_reg_usb3_vbus1>;
|
||||
};
|
||||
|
||||
cp2_sfp_eth0: sfp-eth0 {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&cp2_sfpp0_i2c>;
|
||||
los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>;
|
||||
mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>;
|
||||
tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>;
|
||||
tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
chassis0-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 0>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
chassis1-thermal {
|
||||
thermal-sensors = <&puzzle_hwmon 1>;
|
||||
PUZZLE_FAN_CHASSIS_THERMAL(chassis1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy0-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy1-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp0-phy2-thermal {
|
||||
thermal-sensors = <&cp0_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp0_phy2, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy0-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy1-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp1-phy2-thermal {
|
||||
thermal-sensors = <&cp1_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp1_phy2, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp2-phy0-thermal {
|
||||
thermal-sensors = <&cp2_nbaset_phy0>;
|
||||
PUZZLE_FAN_THERMAL(cp2_phy0, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp2-phy1-thermal {
|
||||
thermal-sensors = <&cp2_nbaset_phy1>;
|
||||
PUZZLE_FAN_THERMAL(cp2_phy1, &chassis_fan_group0);
|
||||
};
|
||||
|
||||
cp2-phy2-thermal {
|
||||
thermal-sensors = <&cp2_nbaset_phy2>;
|
||||
PUZZLE_FAN_THERMAL(cp2_phy2, &chassis_fan_group0);
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_uart0 {
|
||||
status = "okay";
|
||||
|
||||
puzzle-mcu {
|
||||
compatible = "iei,wt61p803-puzzle";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
current-speed = <115200>;
|
||||
enable-beep;
|
||||
status = "okay";
|
||||
|
||||
leds {
|
||||
compatible = "iei,wt61p803-puzzle-leds";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
led@0 {
|
||||
reg = <0>;
|
||||
label = "white:network";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led@1 {
|
||||
reg = <1>;
|
||||
label = "green:cloud";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_info: led@2 {
|
||||
reg = <2>;
|
||||
label = "orange:info";
|
||||
active-low;
|
||||
};
|
||||
|
||||
led_power: led@3 {
|
||||
reg = <3>;
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_YELLOW>;
|
||||
active-low;
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
puzzle_hwmon: hwmon {
|
||||
compatible = "iei,wt61p803-puzzle-hwmon";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
|
||||
chassis_fan_group0: fan-group@0 {
|
||||
#cooling-cells = <2>;
|
||||
reg = <0x00>;
|
||||
cooling-levels = <0 159 195 211 223 241 255>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* on-board eMMC - U9 */
|
||||
&ap_sdhci0 {
|
||||
pinctrl-names = "default";
|
||||
bus-width = <8>;
|
||||
status = "okay";
|
||||
mmc-ddr-1_8v;
|
||||
mmc-hs400-1_8v;
|
||||
};
|
||||
|
||||
&cp0_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_xmdio {
|
||||
status = "okay";
|
||||
cp0_nbaset_phy0: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp0_nbaset_phy2: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON9 */
|
||||
&cp0_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-kr";
|
||||
phys = <&cp0_comphy2 0>;
|
||||
phy = <&cp0_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp0_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy4 1>;
|
||||
phy = <&cp0_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp0_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp0_comphy1 2>;
|
||||
phy = <&cp0_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp0_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp0_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_i2c0_pins>;
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
rtc@32 {
|
||||
compatible = "epson,rx8130";
|
||||
reg = <0x32>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_i2c1 {
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON6 */
|
||||
&cp0_sata0 {
|
||||
status = "okay";
|
||||
sata-port@1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy0 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_pcie2 {
|
||||
status = "okay";
|
||||
num-lanes = <1>;
|
||||
num-viewport = <8>;
|
||||
phys = <&cp0_comphy5 2>;
|
||||
};
|
||||
|
||||
/* U55 */
|
||||
&cp0_spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp0_spi0_pins>;
|
||||
reg = <0x700680 0x50>, /* control */
|
||||
<0x2000000 0x1000000>; /* CS0 */
|
||||
status = "okay";
|
||||
spi-flash@0 {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0x0>;
|
||||
spi-max-frequency = <40000000>;
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
reg = <0x0 0x1f0000>;
|
||||
};
|
||||
partition@1f0000 {
|
||||
label = "U-Boot ENV Factory";
|
||||
reg = <0x1f0000 0x10000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "Reserved";
|
||||
reg = <0x200000 0x1f0000>;
|
||||
};
|
||||
partition@3f0000 {
|
||||
label = "U-Boot ENV";
|
||||
reg = <0x3f0000 0x10000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp0_syscon0 {
|
||||
cp0_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp0_i2c0_pins: cp0-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp0_i2c1_pins: cp0-i2c-pins-1 {
|
||||
marvell,pins = "mpp35", "mpp36";
|
||||
marvell,function = "i2c1";
|
||||
};
|
||||
cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
|
||||
marvell,pins = "mpp0", "mpp1", "mpp2",
|
||||
"mpp3", "mpp4", "mpp5",
|
||||
"mpp6", "mpp7", "mpp8",
|
||||
"mpp9", "mpp10", "mpp11";
|
||||
marvell,function = "ge0";
|
||||
};
|
||||
cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
|
||||
marvell,pins = "mpp44", "mpp45", "mpp46",
|
||||
"mpp47", "mpp48", "mpp49",
|
||||
"mpp50", "mpp51", "mpp52",
|
||||
"mpp53", "mpp54", "mpp55";
|
||||
marvell,function = "ge1";
|
||||
};
|
||||
cp0_spi0_pins: cp0-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp0_usb3_1 {
|
||||
status = "okay";
|
||||
phys = <&cp0_comphy3 1>;
|
||||
phy-names = "usb";
|
||||
};
|
||||
|
||||
/*
|
||||
* Instantiate the first connected CP115
|
||||
*/
|
||||
|
||||
#define CP11X_NAME cp1
|
||||
#define CP11X_BASE f4000000
|
||||
#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
|
||||
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
|
||||
#define CP11X_PCIE0_BASE f4600000
|
||||
#define CP11X_PCIE1_BASE f4620000
|
||||
#define CP11X_PCIE2_BASE f4640000
|
||||
|
||||
#include "armada-cp115.dtsi"
|
||||
|
||||
#undef CP11X_NAME
|
||||
#undef CP11X_BASE
|
||||
#undef CP11X_PCIEx_MEM_BASE
|
||||
#undef CP11X_PCIEx_MEM_SIZE
|
||||
#undef CP11X_PCIE0_BASE
|
||||
#undef CP11X_PCIE1_BASE
|
||||
#undef CP11X_PCIE2_BASE
|
||||
|
||||
&cp1_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_xmdio {
|
||||
status = "okay";
|
||||
cp1_nbaset_phy0: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp1_nbaset_phy2: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&cp1_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* CON50 */
|
||||
&cp1_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-kr";
|
||||
phys = <&cp1_comphy2 0>;
|
||||
phy = <&cp1_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp1_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy4 1>;
|
||||
phy = <&cp1_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp1_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp1_comphy1 2>;
|
||||
phy = <&cp1_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp1_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp1_i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cp1_i2c0_pins>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
&cp1_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp1_syscon0 {
|
||||
cp1_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp1_i2c0_pins: cp1-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
cp1_spi0_pins: cp1-spi-pins-0 {
|
||||
marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
|
||||
marvell,function = "spi1";
|
||||
};
|
||||
cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
|
||||
marvell,pins = "mpp3";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Instantiate the second connected CP115
|
||||
*/
|
||||
|
||||
#define CP11X_NAME cp2
|
||||
#define CP11X_BASE f6000000
|
||||
#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000))
|
||||
#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
|
||||
#define CP11X_PCIE0_BASE f6600000
|
||||
#define CP11X_PCIE1_BASE f6620000
|
||||
#define CP11X_PCIE2_BASE f6640000
|
||||
|
||||
#include "armada-cp115.dtsi"
|
||||
|
||||
#undef CP11X_NAME
|
||||
#undef CP11X_BASE
|
||||
#undef CP11X_PCIEx_MEM_BASE
|
||||
#undef CP11X_PCIEx_MEM_SIZE
|
||||
#undef CP11X_PCIE0_BASE
|
||||
#undef CP11X_PCIE1_BASE
|
||||
#undef CP11X_PCIE2_BASE
|
||||
|
||||
&cp2_crypto {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_ethernet {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_xmdio {
|
||||
status = "okay";
|
||||
cp2_nbaset_phy0: ethernet-phy@2 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <2>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp2_nbaset_phy1: ethernet-phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <0>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
cp2_nbaset_phy2: ethernet-phy@8 {
|
||||
compatible = "ethernet-phy-ieee802.3-c45";
|
||||
reg = <8>;
|
||||
#thermal-sensor-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
/* SLM-1521-V2, CON9 */
|
||||
&cp2_eth0 {
|
||||
status = "okay";
|
||||
phy-mode = "10gbase-kr";
|
||||
phys = <&cp2_comphy2 0>;
|
||||
phy = <&cp2_nbaset_phy0>;
|
||||
};
|
||||
|
||||
&cp2_eth1 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp2_comphy4 1>;
|
||||
phy = <&cp2_nbaset_phy1>;
|
||||
};
|
||||
|
||||
&cp2_eth2 {
|
||||
status = "okay";
|
||||
phy-mode = "2500base-x";
|
||||
phys = <&cp2_comphy1 2>;
|
||||
phy = <&cp2_nbaset_phy2>;
|
||||
};
|
||||
|
||||
&cp2_gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cp2_i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
/* SLM-1521-V2 - U3 */
|
||||
i2c-mux@72 {
|
||||
compatible = "nxp,pca9544";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x72>;
|
||||
cp2_sfpp0_i2c: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
/* U12 */
|
||||
cp2_module_expander1: pca9555@21 {
|
||||
compatible = "nxp,pca9555";
|
||||
pinctrl-names = "default";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x21>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&cp2_rtc {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&cp2_syscon0 {
|
||||
cp2_pinctrl: pinctrl {
|
||||
compatible = "marvell,cp115-standalone-pinctrl";
|
||||
cp2_i2c0_pins: cp2-i2c-pins-0 {
|
||||
marvell,pins = "mpp37", "mpp38";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,98 @@
|
||||
#define PUZZLE_FAN_THERMAL(_cname, _fan) \
|
||||
polling-delay-passive = <0>; \
|
||||
polling-delay = <1000>; \
|
||||
\
|
||||
trips { \
|
||||
_cname##_active_full: trip-point5 { \
|
||||
temperature = <70000>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_very_high: trip-point4 { \
|
||||
temperature = <67500>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_high: trip-point3 { \
|
||||
temperature = <65000>; \
|
||||
hysteresis = <5000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_med: trip-point2 { \
|
||||
temperature = <62500>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_low: trip-point1 { \
|
||||
temperature = <60000>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_min: trip-point0 { \
|
||||
temperature = <55000>; \
|
||||
hysteresis = <5000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
}; \
|
||||
cooling-maps { \
|
||||
map5 { \
|
||||
trip = <&_cname##_active_full>; \
|
||||
cooling-device = <_fan 6 6>; \
|
||||
}; \
|
||||
map4 { \
|
||||
trip = <&_cname##_active_very_high>; \
|
||||
cooling-device = <_fan 5 5>; \
|
||||
}; \
|
||||
map3 { \
|
||||
trip = <&_cname##_active_high>; \
|
||||
cooling-device = <_fan 4 4>; \
|
||||
}; \
|
||||
map2 { \
|
||||
trip = <&_cname##_active_med>; \
|
||||
cooling-device = <_fan 3 3>; \
|
||||
}; \
|
||||
map1 { \
|
||||
trip = <&_cname##_active_low>; \
|
||||
cooling-device = <_fan 2 2>; \
|
||||
}; \
|
||||
map0 { \
|
||||
trip = <&_cname##_active_min>; \
|
||||
cooling-device = <_fan 1 1>; \
|
||||
}; \
|
||||
}
|
||||
|
||||
#define PUZZLE_FAN_CHASSIS_THERMAL(_cname, _fan) \
|
||||
polling-delay-passive = <0>; \
|
||||
polling-delay = <5000>; \
|
||||
\
|
||||
trips { \
|
||||
_cname##_active_full: trip-point2 { \
|
||||
temperature = <70000>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_med: trip-point1 { \
|
||||
temperature = <62500>; \
|
||||
hysteresis = <3000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
_cname##_active_min: trip-point0 { \
|
||||
temperature = <55000>; \
|
||||
hysteresis = <5000>; \
|
||||
type = "active"; \
|
||||
}; \
|
||||
}; \
|
||||
cooling-maps { \
|
||||
map2 { \
|
||||
trip = <&_cname##_active_full>; \
|
||||
cooling-device = <_fan 6 6>; \
|
||||
}; \
|
||||
map1 { \
|
||||
trip = <&_cname##_active_med>; \
|
||||
cooling-device = <_fan 3 3>; \
|
||||
}; \
|
||||
map0 { \
|
||||
trip = <&_cname##_active_min>; \
|
||||
cooling-device = <_fan 1 1>; \
|
||||
}; \
|
||||
}
|
||||
Reference in New Issue
Block a user