Initial commit

target/linux/octeon/Makefile

@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2013 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+
+ARCH:=mips64
+BOARD:=octeon
+BOARDNAME:=Cavium Networks Octeon
+FEATURES:=squashfs ramdisk pci usb
+CPU_TYPE:=octeonplus
+
+KERNEL_PATCHVER:=6.6
+
+define Target/Description
+	Build firmware images for Cavium Networks Octeon-based boards.
+endef
+
+include $(INCLUDE_DIR)/target.mk
+
+DEFAULT_PACKAGES += mkf2fs e2fsprogs
+
+$(eval $(call BuildTarget))

target/linux/octeon/base-files/etc/board.d/01_network

@@ -0,0 +1,30 @@
+#
+# Copyright (C) 2014-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+itus,shield-router|\
+ubnt,usg)
+	ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0"
+	;;
+ubnt,edgerouter-4)
+	ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "lan0"
+	;;
+ubnt,edgerouter-6p)
+	ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" "lan0"
+	;;
+cisco,vedge1000)
+	ucidef_set_interfaces_lan_wan "mgmt0" "lan0"
+	;;
+*)
+	ucidef_set_interfaces_lan_wan "eth0" "eth1"
+	;;
+esac
+
+board_config_flush
+
+exit 0

target/linux/octeon/base-files/lib/preinit/01_sysinfo

@@ -0,0 +1,50 @@
+do_sysinfo_octeon() {
+	local machine
+	local name
+
+	machine=$(grep "^system type" /proc/cpuinfo | sed "s/system type.*: \(.*\)/\1/g")
+	of_machine=$(head -n1 /sys/firmware/devicetree/base/compatible)
+
+	# Sadly for whatever reason the N821 (Cisco Viptela vEdge 1000) uses the
+	# same supposedly unique board ID as the EdgeRouter. This is bad, so
+	# we override what cpuinfo gives us using the device tree as a hint.
+	case "$of_machine" in
+	"cisco,vedge1000"*)
+		return 0
+	esac
+
+	case "$machine" in
+	"UBNT_E100"*)
+		name="erlite"
+		;;
+
+	"UBNT_E200"*)
+		name="er"
+		;;
+
+	"UBNT_E220"*)
+		name="erpro"
+		;;
+
+	"UBNT_E300"*|\
+	"UBNT_USG"*)
+		# let generic 02_sysinfo handle it since device has its own device tree
+		return 0
+		;;
+
+	"ITUS_SHIELD"*)
+		name="itus,shield-router"
+		;;
+
+	*)
+		name="generic"
+		;;
+	esac
+
+	[ -e "/tmp/sysinfo/" ] || mkdir -p "/tmp/sysinfo/"
+
+	echo "$name" > /tmp/sysinfo/board_name
+	echo "$machine" > /tmp/sysinfo/model
+}
+
+boot_hook_add preinit_main do_sysinfo_octeon

target/linux/octeon/base-files/lib/preinit/79_move_config

@@ -0,0 +1,50 @@
+# Copyright (C) 2014 OpenWrt.org
+
+move_config() {
+	. /lib/upgrade/common.sh
+
+	local device="$1"
+	local fstype="$2"
+	[ -n "$device" ] && [ -b "$device" ] && {
+		mount -t "${fstype}" "$device" /mnt
+		[ -f "/mnt/$BACKUP_FILE" ] && mv -f "/mnt/$BACKUP_FILE" /
+		umount /mnt
+	}
+}
+
+octeon_get_n821_disk() {
+	local partnum=$1
+	local MAJOR MINOR DEVNAME DEVTYPE
+	while read line; do
+		export -n "${line}"
+	done < $(find /sys/bus/platform/devices/16f0000000000.ehci/ -path \*block/sd[a-z]/uevent)
+	echo "/dev/${DEVNAME}${partnum}"
+}
+
+octeon_move_config() {
+	. /lib/functions.sh
+
+	case "$(board_name)" in
+		erlite|\
+		ubnt,usg)
+			move_config "/dev/sda1" "vfat"
+			;;
+		itus,shield-router)
+			move_config "/dev/mmcblk1p1" "vfat"
+			;;
+		er|\
+		ubnt,edgerouter-4|\
+		ubnt,edgerouter-6p)
+			move_config "/dev/mmcblk0p1" "vfat"
+			;;
+		cisco,vedge1000)
+			# Copy from the internal USB disk's first partition.
+			# It is resolved from the device path to not be dependent on which
+			# /dev/sd? path it is at, nor which UUID it happens to have.
+			move_config "$(octeon_get_n821_disk 1)" "ext2"
+			;;
+
+	esac
+}
+
+boot_hook_add preinit_mount_root octeon_move_config

target/linux/octeon/base-files/lib/upgrade/platform.sh

@@ -0,0 +1,182 @@
+#
+# Copyright (C) 2021 OpenWrt.org
+#
+
+if [ -x /usr/sbin/blkid ]; then
+  RAMFS_COPY_BIN="/usr/sbin/blkid"
+fi
+
+platform_get_rootfs() {
+	local rootfsdev
+	local rootpartuuid
+
+	if read cmdline < /proc/cmdline; then
+		case "$cmdline" in
+			*root=PARTUUID=*)
+				rootpartuuid="${cmdline##*root=PARTUUID=}"
+				rootpartuuid="${rootpartuuid%% *}"
+				rootfsdev="$(blkid -o device -t PARTUUID="${rootpartuuid}")"
+			;;
+			*root=*)
+				rootfsdev="${cmdline##*root=}"
+				rootfsdev="${rootfsdev%% *}"
+			;;
+		esac
+
+		echo "${rootfsdev}"
+	fi
+}
+
+platform_get_n821_disk() {
+	local partnum=$1
+	local DEVNAME
+	while read line; do
+		export -n "${line}"
+	done < $(find /sys/bus/platform/devices/16f0000000000.ehci/ -path \*block/sd[a-z]/uevent)
+	echo "/dev/${DEVNAME}${partnum}"
+}
+
+platform_copy_config_helper() {
+	local device=$1
+	local fstype=$2
+
+	mount -t "${fstype}" "$device" /mnt
+	cp -af "$UPGRADE_BACKUP" "/mnt/$BACKUP_FILE"
+	umount /mnt
+}
+
+platform_copy_config() {
+	case "$(board_name)" in
+	erlite|\
+	ubnt,usg)
+		platform_copy_config_helper /dev/sda1 vfat
+		;;
+	itus,shield-router)
+		platform_copy_config_helper /dev/mmcblk1p1 vfat
+		;;
+	er|\
+	ubnt,edgerouter-4|\
+	ubnt,edgerouter-6p)
+		platform_copy_config_helper /dev/mmcblk0p1 vfat
+		;;
+	cisco,vedge1000)
+		platform_copy_config_helper "$(platform_get_n821_disk 1)" ext2
+		;;
+	esac
+}
+
+platform_do_flash() {
+	local tar_file=$1
+	local board=$2
+	local kernel=$3
+	local rootfs=$4
+
+	local board_dir=$(tar tf "$tar_file" | grep -m 1 '^sysupgrade-.*/$')
+	board_dir=${board_dir%/}
+	[ -n "$board_dir" ] || return 1
+
+	mkdir -p /boot
+
+	if [ $board = "itus,shield-router" ]; then
+		# mmcblk1p1 (fat) contains all ELF-bin images for the Shield
+		mount /dev/mmcblk1p1 /boot
+
+		echo "flashing Itus Kernel to /boot/$kernel (/dev/mmblk1p1)"
+		tar -Oxf $tar_file "$board_dir/kernel" > /boot/$kernel
+	else
+		if [ "${board}" = "cisco,vedge1000" ]; then
+			local rootpartuuid
+			rootpartuuid="$(/usr/sbin/blkid -o value -s PARTUUID "${rootfs}")"
+			if [ -n "${rootpartuuid}" ]; then
+				echo "setting root partition to PARTUUID=${rootpartuuid}"
+				fw_setenv bootcmd 'usb start; ext2load usb 0:1 $loadaddr vmlinux.64; bootoctlinux $loadaddr coremask=f endbootargs rootfstype=squashfs rootwait root=PARTUUID='"${rootpartuuid}"
+			else
+				echo "WARNING: unable to figure out root partition UUID, leaving bootcmd unchanged"
+			fi
+			mount -t ext2 "${kernel}" /boot
+		else
+			mount -t vfat "${kernel}" /boot
+		fi
+
+		[ -f /boot/vmlinux.64 -a ! -L /boot/vmlinux.64 ] && {
+			mv /boot/vmlinux.64 /boot/vmlinux.64.previous
+			mv /boot/vmlinux.64.md5 /boot/vmlinux.64.md5.previous
+		}
+
+		echo "flashing kernel to $(awk '/\/boot/ {print $1}' /proc/mounts)"
+		tar xf $tar_file $board_dir/kernel -O > /boot/vmlinux.64
+		md5sum /boot/vmlinux.64 | cut -f1 -d " " > /boot/vmlinux.64.md5
+	fi
+
+	echo "flashing rootfs to ${rootfs}"
+	tar xf $tar_file $board_dir/root -O | dd of="${rootfs}" bs=4096
+
+	sync
+	umount /boot
+}
+
+platform_do_upgrade() {
+	local tar_file="$1"
+	local board=$(board_name)
+	local rootfs="$(platform_get_rootfs)"
+	local kernel=
+
+	if [ ! -b "${rootfs}" ] && [ "${board}" = "cisco,vedge1000" ]; then
+		# Default to the built-in USB disk for N821
+		rootfs="$(platform_get_n821_disk 2)"
+	fi
+	[ -b "${rootfs}" ] || return 1
+	case "$board" in
+	er | \
+	ubnt,edgerouter-4 | \
+	ubnt,edgerouter-6p)
+		kernel=/dev/mmcblk0p1
+		;;
+	erlite|\
+	ubnt,usg)
+		kernel=/dev/sda1
+		;;
+	itus,shield-router)
+		kernel=ItusrouterImage
+		;;
+	cisco,vedge1000)
+		kernel="$(platform_get_n821_disk 1)"
+		;;
+	*)
+		return 1
+	esac
+
+	platform_do_flash $tar_file $board $kernel $rootfs
+
+	return 0
+}
+
+platform_check_image() {
+	local board=$(board_name)
+	local tar_file="$1"
+
+	local board_dir=$(tar tf "$tar_file" | grep -m 1 '^sysupgrade-.*/$')
+	board_dir=${board_dir%/}
+	[ -n "$board_dir" ] || return 1
+
+	case "$board" in
+	er | \
+	erlite | \
+	itus,shield-router | \
+	ubnt,edgerouter-4 | \
+	ubnt,edgerouter-6p | \
+	ubnt,usg | \
+	cisco,vedge1000)
+		local kernel_length=$(tar xf $tar_file $board_dir/kernel -O | wc -c 2> /dev/null)
+		local rootfs_length=$(tar xf $tar_file $board_dir/root -O | wc -c 2> /dev/null)
+		[ "$kernel_length" = 0 -o "$rootfs_length" = 0 ] && {
+			echo "The upgrade image is corrupt."
+			return 1
+		}
+		return 0
+		;;
+	esac
+
+	echo "Sysupgrade is not yet supported on $board."
+	return 1
+}

target/linux/octeon/config-6.6

@@ -0,0 +1,282 @@
+CONFIG_64BIT=y
+CONFIG_AHCI_OCTEON=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MMAP_RND_BITS=12
+CONFIG_ARCH_MMAP_RND_BITS_MAX=18
+CONFIG_ARCH_MMAP_RND_BITS_MIN=12
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_AT803X_PHY=y
+CONFIG_ATA=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BUFFER_HEAD=y
+CONFIG_BUILTIN_DTB=y
+CONFIG_CAVIUM_CN63XXP1=y
+CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=0
+CONFIG_CAVIUM_OCTEON_LOCK_L2=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y
+CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y
+CONFIG_CAVIUM_OCTEON_SOC=y
+CONFIG_CAVIUM_RESERVE32=0
+CONFIG_CEVT_R4K=y
+CONFIG_CLONE_BACKWARDS=y
+# CONFIG_COMMON_CLK is not set
+CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
+CONFIG_COMPAT_32BIT_TIME=y
+CONFIG_CONTEXT_TRACKING=y
+CONFIG_CONTEXT_TRACKING_IDLE=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_CAVIUM_OCTEON=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_DIEI=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_RIXI=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS64=y
+CONFIG_CPU_MIPSR2=y
+CONFIG_CPU_MITIGATIONS=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_RMAP=y
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CPU_SUPPORTS_HUGEPAGES=y
+CONFIG_CRAMFS=y
+CONFIG_CRC16=y
+CONFIG_CRYPTO_CRC32=y
+CONFIG_CRYPTO_CRC32C=y
+CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
+CONFIG_CRYPTO_LIB_GF128MUL=y
+CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
+CONFIG_CRYPTO_LIB_SHA1=y
+CONFIG_CRYPTO_LIB_UTILS=y
+# CONFIG_CRYPTO_MD5_OCTEON is not set
+# CONFIG_CRYPTO_SHA1_OCTEON is not set
+# CONFIG_CRYPTO_SHA256_OCTEON is not set
+# CONFIG_CRYPTO_SHA512_OCTEON is not set
+# CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set
+CONFIG_DEBUG_INFO_NONE=y
+CONFIG_DEPRECATED_IRQ_CPU_ONOFFLINE=y
+CONFIG_DNOTIFY=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_EDAC=y
+CONFIG_EDAC_ATOMIC_SCRUB=y
+# CONFIG_EDAC_DEBUG is not set
+CONFIG_EDAC_LEGACY_SYSFS=y
+CONFIG_EDAC_OCTEON_L2C=y
+CONFIG_EDAC_OCTEON_LMC=y
+CONFIG_EDAC_OCTEON_PC=y
+CONFIG_EDAC_OCTEON_PCI=y
+CONFIG_EDAC_SUPPORT=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EXCLUSIVE_SYSTEM_RAM=y
+CONFIG_EXT4_FS=y
+CONFIG_F2FS_FS=y
+CONFIG_FAT_FS=y
+CONFIG_FIXED_PHY=y
+CONFIG_FS_IOMAP=y
+CONFIG_FS_MBCACHE=y
+CONFIG_FUNCTION_ALIGNMENT=0
+CONFIG_FWNODE_MDIO=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_SYSFS=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_GENERIC_IOMAP=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_LIB_ASHLDI3=y
+CONFIG_GENERIC_LIB_ASHRDI3=y
+CONFIG_GENERIC_LIB_CMPDI2=y
+CONFIG_GENERIC_LIB_LSHRDI3=y
+CONFIG_GENERIC_LIB_UCMPDI2=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GLOB=y
+CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_OCTEON=y
+CONFIG_GRO_CELLS=y
+CONFIG_HARDWARE_WATCHPOINTS=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_OCTEON=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_OCTEON=y
+CONFIG_IMAGE_CMDLINE_HACK=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_JBD2=y
+CONFIG_LEGACY_DIRECT_IO=y
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_CAVIUM=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_DEVRES=y
+CONFIG_MDIO_OCTEON=y
+CONFIG_MIGRATION=y
+CONFIG_MIPS=y
+CONFIG_MIPS_ASID_BITS=8
+CONFIG_MIPS_ASID_SHIFT=0
+CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_MIPS_ELF_APPENDED_DTB=y
+CONFIG_MIPS_FP_SUPPORT=y
+CONFIG_MIPS_L1_CACHE_SHIFT=7
+CONFIG_MIPS_L1_CACHE_SHIFT_7=y
+# CONFIG_MIPS_NO_APPENDED_DTB is not set
+CONFIG_MIPS_NR_CPU_NR_MAP=1024
+CONFIG_MIPS_NR_CPU_NR_MAP_1024=y
+CONFIG_MIPS_PGD_C0_CONTEXT=y
+CONFIG_MIPS_SPRAM=y
+CONFIG_MMC=y
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_CAVIUM_OCTEON=y
+CONFIG_MMU_LAZY_TLB_REFCOUNT=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MODULES_USE_ELF_RELA=y
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_SRCU_NMI_SAFE=y
+CONFIG_NET_DEVLINK=y
+CONFIG_NET_DSA=y
+CONFIG_NET_EGRESS=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NET_INGRESS=y
+CONFIG_NET_SELFTESTS=y
+CONFIG_NET_SWITCHDEV=y
+CONFIG_NET_XGRESS=y
+CONFIG_NLS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+CONFIG_NR_CPUS=16
+CONFIG_NR_CPUS_DEFAULT_64=y
+CONFIG_NVMEM=y
+CONFIG_NVMEM_LAYOUTS=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OCTEON_ETHERNET=y
+CONFIG_OCTEON_ILM=y
+CONFIG_OCTEON_MGMT_ETHERNET=y
+CONFIG_OCTEON_WDT=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_PADATA=y
+CONFIG_PAGE_POOL=y
+CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
+CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_PATA_OCTEON_CF=y
+CONFIG_PATA_TIMINGS=y
+CONFIG_PCI=y
+CONFIG_PCIEAER=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DRIVERS_LEGACY=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=3
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_LEDS=y
+CONFIG_PHYLINK=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+CONFIG_PREEMPT_NONE_BUILD=y
+CONFIG_PTP_1588_CLOCK_OPTIONAL=y
+CONFIG_QUEUED_RWLOCKS=y
+CONFIG_QUEUED_SPINLOCKS=y
+CONFIG_RANDSTRUCT_NONE=y
+CONFIG_RAS=y
+CONFIG_REGULATOR=y
+CONFIG_REGMAP=y
+CONFIG_REGMAP_I2C=y
+CONFIG_RELAY=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_SATA_HOST=y
+CONFIG_SCSI=y
+CONFIG_SCSI_COMMON=y
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_8250_DWLIB=y
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SG_POOL=y
+CONFIG_SMP=y
+CONFIG_SOCK_RX_QUEUE_MAPPING=y
+CONFIG_SPARSEMEM=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SPI_MEM=y
+CONFIG_SPI_OCTEON=y
+CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
+CONFIG_SWIOTLB=y
+CONFIG_SWPHY=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_SYS_SUPPORTS_RELOCATABLE=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_TARGET_ISA_REV=2
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TREE_RCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_USB=y
+CONFIG_USB_COMMON=y
+CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
+# CONFIG_USB_OCTEON_EHCI is not set
+CONFIG_USB_OCTEON_HCD=y
+# CONFIG_USB_OCTEON_OHCI is not set
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PLATFORM=y
+CONFIG_USE_OF=y
+CONFIG_VFAT_FS=y
+CONFIG_VITESSE_PHY=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_CORE=y
+CONFIG_WEAK_ORDERING=y
+CONFIG_XPS=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZONE_DMA32=y

target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn5020_ubnt_usg.dts

@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device tree source for Ubiquity UniFi Security Gateway.
+ *
+ * Written for EdgeRouter Lite by: Aaro Koskinen <aaro.koskinen@iki.fi>
+ * Adapted for USG by: Clemens Hopfer <openwrt@wireloss.net>
+ */
+
+/include/ "octeon_3xxx.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "ubnt,usg";
+	model = "Ubiquiti UniFi Security Gateway";
+
+	soc@0 {
+		smi0: mdio@1180000001800 {
+			phy5: ethernet-phy@5 {
+				reg = <5>;
+				compatible = "ethernet-phy-ieee802.3-c22";
+			};
+			phy6: ethernet-phy@6 {
+				reg = <6>;
+				compatible = "ethernet-phy-ieee802.3-c22";
+			};
+			phy7: ethernet-phy@7 {
+				reg = <7>;
+				compatible = "ethernet-phy-ieee802.3-c22";
+			};
+		};
+
+		pip: pip@11800a0000000 {
+			interface@0 {
+				ethernet@0 {
+					phy-handle = <&phy7>;
+					rx-delay = <0>;
+					tx-delay = <0x10>;
+				};
+				ethernet@1 {
+					phy-handle = <&phy6>;
+					rx-delay = <0>;
+					tx-delay = <0x10>;
+				};
+				ethernet@2 {
+					phy-handle = <&phy5>;
+					rx-delay = <0>;
+					tx-delay = <0x10>;
+				};
+			};
+		};
+
+		uart0: serial@1180000000800 {
+			clock-frequency = <500000000>;
+		};
+
+		usbn: usbn@1180068000000 {
+			refclk-frequency = <12000000>;
+			refclk-type = "crystal";
+		};
+
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_dome_white: led-0 {
+			label = "white:dome";
+			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_dome_blue: led-1 {
+			label = "blue:dome";
+			gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+
+		key-restart {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+
+	aliases {
+		pip = &pip;
+		led-boot = &led_dome_white;
+		led-failsafe = &led_dome_blue;
+		led-running = &led_dome_blue;
+		led-upgrade = &led_dome_blue;
+	};
+};

target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn6130_cisco_vedge1000.dts

@@ -0,0 +1,291 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/include/ "octeon_3xxx.dtsi"
+
+/ {
+	compatible = "cisco,vedge1000", "cavium,cn6130";
+	model = "Cisco/Viptela vEdge 1000";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&ciu>;
+
+	soc@0 {
+		smi0: mdio@1180000001800 {
+			mgmtphy: ethernet-phy@0 {
+				reg = <0x00>;
+			};
+		};
+
+		mgmt0: ethernet@1070000100000 {
+			compatible = "cavium,octeon-5750-mix";
+			reg = <0x10700 0x100000 0x00 0x100>,
+			      <0x11800 0xe0000000 0x00 0x300>,
+			      <0x11800 0xe0000400 0x00 0x400>,
+			      <0x11800 0xe0002000 0x00 0x08>;
+			cell-index = <0x00>;
+			interrupts = <0x00 0x3e 0x01 0x2e>;
+			nvmem-cells = <&macaddr_eeprom 0>;
+			nvmem-cell-names = "mac-address";
+			phy-handle = <&mgmtphy>;
+		};
+
+		pip: pip@11800a0000000 {
+			interface@0 {
+				ethernet@0 {
+					nvmem-cells = <&macaddr_eeprom 3>;
+					nvmem-cell-names = "mac-address";
+					label = "lan2";
+					/delete-property/ local-mac-address;
+				};
+
+				ethernet@1 {
+					nvmem-cells = <&macaddr_eeprom 4>;
+					nvmem-cell-names = "mac-address";
+					label = "lan3";
+					/delete-property/ local-mac-address;
+				};
+
+				ethernet@2 {
+					nvmem-cells = <&macaddr_eeprom 1>;
+					nvmem-cell-names = "mac-address";
+					label = "lan0";
+					/delete-property/ local-mac-address;
+				};
+
+				ethernet@3 {
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0x3>;
+					nvmem-cells = <&macaddr_eeprom 2>;
+					nvmem-cell-names = "mac-address";
+					label = "lan1";
+				};
+			};
+
+			interface@1 {
+				ethernet@0 {
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0x0>;
+					nvmem-cells = <&macaddr_eeprom 7>;
+					nvmem-cell-names = "mac-address";
+					label = "lan6";
+				};
+
+				ethernet@1 {
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0x1>;
+					nvmem-cells = <&macaddr_eeprom 8>;
+					nvmem-cell-names = "mac-address";
+					label = "lan7";
+				};
+
+				ethernet@2 {
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0x2>;
+					nvmem-cells = <&macaddr_eeprom 5>;
+					nvmem-cell-names = "mac-address";
+					label = "lan4";
+				};
+
+				ethernet@3 {
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0x3>;
+					nvmem-cells = <&macaddr_eeprom 6>;
+					nvmem-cell-names = "mac-address";
+					label = "lan5";
+				};
+			};
+		};
+
+		twsi0: i2c@1180000001000 {
+			clock-frequency = <400000>;
+
+			jc42@18 {
+				compatible = "jedec,jc-42.4-temp";
+				reg = <0x18>;
+			};
+		};
+
+		twsi2: i2c@1180000001200 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3860-twsi";
+			reg = <0x11800 0x1200 0x00 0x200>;
+			interrupts = <0x00 0x3b>;
+			clock-frequency = <400000>;
+
+			tmp@4c {
+				compatible = "maxim,max6699";
+				reg = <0x4c>;
+			};
+
+			rtc@6f {
+				compatible = "microchip,mcp7941x";
+				reg = <0x6f>;
+			};
+
+			tlv-eeprom@54 {
+				compatible = "atmel,24c512";
+				reg = <0x54>;
+				pagesize = <0x80>;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_eeprom: mac-address@8 {
+						compatible = "mac-base";
+						reg = <0x8 6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+		};
+
+		uart0: serial@1180000000800 {
+			clock-frequency = <600000000>;
+			current-speed = <115200>;
+		};
+
+		uart1: serial@1180000000c00 {
+			compatible = "cavium,octeon-3860-uart", "ns16550";
+			reg = <0x11800 0xc00 0x00 0x400>;
+			reg-shift = <0x03>;
+			interrupts = <0x00 0x23>;
+			clock-frequency = <600000000>;
+			current-speed = <115200>;
+		};
+
+		mmc0: mmc@1180000002000 {
+			compatible = "cavium,octeon-6130-mmc";
+			reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <0x01 0x13 0x00 0x3f>;
+
+			mmc-slot@0 {
+				compatible = "cavium,octeon-6130-mmc-slot";
+				reg = <0x00>;
+				voltage-ranges = <0xce4 0xce4>;
+				max-frequency = <0x3197500>;
+				wp-gpios = <&gpio 0x02 0x00>;
+				cd-gpios = <&gpio 0x03 0x01>;
+				cavium,bus-max-width = <0x04>;
+			};
+		};
+
+		bootbus: bootbus@1180000000000 {
+			compatible = "cavium,octeon-3860-bootbus";
+			reg = <0x11800 0x00 0x00 0x200>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+			ranges = <0 0 0x00 0x1ec00000 0x1400000>,
+				 <1 0 0x10000 0x20000000 0x00>,
+				 <2 0 0x10000 0x30000000 0x00>,
+				 <3 0 0x10000 0x40000000 0x00>,
+				 <4 0 0x10000 0x50000000 0x00>,
+				 <5 0 0x10000 0x60000000 0x00>,
+				 <6 0 0x00 0x1e000000 0x10000>,
+				 <7 0 0x10000 0x80000000 0x00>;
+
+			cavium,cs-config@0 {
+				compatible = "cavium,octeon-3860-bootbus-config";
+				cavium,cs-index = <0x00>;
+				cavium,t-adr = <0x0a>;
+				cavium,t-ce = <0x32>;
+				cavium,t-oe = <0x32>;
+				cavium,t-we = <0x23>;
+				cavium,t-rd-hld = <0x19>;
+				cavium,t-wr-hld = <0x23>;
+				cavium,t-pause = <0x00>;
+				cavium,t-wait = <0x12c>;
+				cavium,t-page = <0x19>;
+				cavium,t-rd-dly = <0x00>;
+				cavium,t-ale = <0x03>;
+				cavium,pages = <0x00>;
+				cavium,bus-width = <0x10>;
+			};
+
+			/delete-node/ cavium,cs-config@1;
+			/delete-node/ cavium,cs-config@2;
+			/delete-node/ cavium,cs-config@3;
+			/delete-node/ cavium,cs-config@4;
+			/delete-node/ cavium,cs-config@5;
+
+			cavium,cs-config@6 {
+				compatible = "cavium,octeon-3860-bootbus-config";
+				cavium,cs-index = <0x06>;
+				cavium,t-adr = <0x0a>;
+				cavium,t-ce = <0x0a>;
+				cavium,t-oe = <0xa0>;
+				cavium,t-we = <0x64>;
+				cavium,t-rd-hld = <0x00>;
+				cavium,t-wr-hld = <0x00>;
+				cavium,t-pause = <0x32>;
+				cavium,t-wait = <0x12c>;
+				cavium,t-page = <0x12c>;
+				cavium,t-rd-dly = <0x0a>;
+				cavium,t-ale = <0x3f>;
+				cavium,pages = <0x00>;
+				cavium,bus-width = <0x08>;
+				/delete-property/ cavium,wait-mode;
+			};
+
+			flash0: nor@0,0 {
+				compatible = "cfi-flash";
+				reg = <0x00 0x00 0x1000000>;
+				bank-width = <2>;
+				device-width = <1>;
+
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition@0 {
+					label = "bootloader";
+					reg = <0x00 0x200000>;
+					read-only;
+				};
+
+				partition@fe0000 {
+					label = "environment";
+					reg = <0xfe0000 0x20000>;
+				};
+			};
+
+			cpld: cpld@6,0 {
+				compatible = "cisco,n821-cpld", "syscon", "simple-mfd";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg-io-width = <1>; // Syscon uses 4-byte accesses by default
+
+				reg = <0x06 0x00 0x28>;     // This is the regmap to be defined for syscon devices..
+				ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on
+			};
+		};
+
+		uctl@118006f000000 {
+			compatible = "cavium,octeon-6335-uctl";
+			reg = <0x11800 0x6f000000 0x00 0x100>;
+			ranges;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			refclk-frequency = <0xb71b00>;
+			refclk-type = "crystal";
+
+			ehci@16f0000000000 {
+				compatible = "cavium,octeon-6335-ehci", "usb-ehci";
+				reg = <0x16f00 0x00 0x00 0x100>;
+				interrupts = <0x00 0x38>;
+				big-endian-regs;
+			};
+
+			ohci@16f0000000400 {
+				compatible = "cavium,octeon-6335-ohci", "usb-ohci";
+				reg = <0x16f00 0x400 0x00 0x100>;
+				interrupts = <0x00 0x38>;
+				big-endian-regs;
+			};
+		};
+	};
+};
+

target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-4.dts

@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "cn7130_ubnt_edgerouter-e300.dtsi"
+
+/ {
+	compatible = "ubnt,edgerouter-4", "cavium,cn7130";
+	model = "Ubiquiti EdgeRouter 4";
+};
+
+&pip {
+	interface@0 {
+		ethernet@0 {
+			label = "lan3";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy4>;
+			nvmem-cells = <&macaddr_eeprom_0 0>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+};

target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-6p.dts

@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "cn7130_ubnt_edgerouter-e300.dtsi"
+
+/ {
+	compatible = "ubnt,edgerouter-6p", "cavium,cn7130";
+	model = "Ubiquiti EdgeRouter 6P";
+};
+
+&smi0 {
+	phy8: ethernet-phy@8 {
+		device_type = "ethernet-phy";
+		interrupts = <17 8>;
+		interrupt-parent = <&gpio>;
+		compatible = "vitesse,vsc8514", "ethernet-phy-ieee802.3-c22";
+		reg = <8>;
+	};
+
+	phy9: ethernet-phy@9 {
+		device_type = "ethernet-phy";
+		interrupts = <17 8>;
+		interrupt-parent = <&gpio>;
+		compatible = "vitesse,vsc8514", "ethernet-phy-ieee802.3-c22";
+		reg = <9>;
+	};
+};
+
+&pip {
+	interface@0 {
+		ethernet@0 {
+			label = "lan5";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy4>;
+			nvmem-cells = <&macaddr_eeprom_0 0>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+
+	interface@1 {
+		status = "okay";
+
+		ethernet@0 {
+			label = "lan3";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy8>;
+			nvmem-cells = <&macaddr_eeprom_0 4>;
+			nvmem-cell-names = "mac-address";
+		};
+
+		ethernet@1 {
+			label = "lan4";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy9>;
+			nvmem-cells = <&macaddr_eeprom_0 5>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+};
+

target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn7130_ubnt_edgerouter-e300.dtsi

@@ -0,0 +1,226 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "cn71xx.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	compatible = "ubnt,edgerouter-e300", "cavium,cn7130";
+	model = "Ubiquiti EdgeRouter E300 series";
+
+	aliases {
+		/* White + Blinking Blue */
+		led-boot = &led_power_white;
+		/* Blue + Blinking White */
+		led-failsafe = &led_power_blue;
+		/* Constant Blue */
+		led-running = &led_power_blue;
+		/* Blue + Blinking White */
+		led-upgrade = &led_power_blue;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x00000000>,
+		      <0x0 0x10000000>,
+		      <0x0 0x20000000>,
+		      <0x0 0x30000000>;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_blue: power_blue {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_BLUE>;
+			gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_power_white: power_white {
+			function = LED_FUNCTION_POWER;
+			color = <LED_COLOR_ID_WHITE>;
+			gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+
+	sfp: sfp {
+		compatible = "sff,sfp";
+		i2c-bus = <&twsi0>;
+		/* Pins 12, 13 and 14 gets pulled low when SFP is plugged in */
+		mod-def0-gpio = <&gpio 12 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&xhci0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&twsi0 {
+	status = "okay";
+
+	sfp_eeprom@50 {
+		compatible = "at,24c04";
+		reg = <0x50>;
+	};
+
+	sfp_eeprom@51 {
+		compatible = "at,24c04";
+		reg = <0x51>;
+	};
+};
+
+&spi {
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "Macronix,mx25l6405d", "spi-flash";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "boot0";
+				read-only;
+				reg = <0x000000 0x300000>;
+			};
+
+			partition@300000 {
+				label = "dummy";
+				read-only;
+				reg = <0x300000 0x100000>;
+			};
+
+			partition@400000 {
+				label = "eeprom";
+				read-only;
+				reg = <0x400000 0x10000>;
+
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_eeprom_0: macaddr@0 {
+						compatible = "mac-base";
+						reg = <0x0 0x6>;
+						#nvmem-cell-cells = <1>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&mmc {
+	status = "okay";
+
+	mmc-slot@0 {
+		compatible = "mmc-slot";
+		reg = <0>;
+		non-removable;
+		max-frequency = <26000000>;
+		voltage-ranges = <3300 3300>;
+		bus-width = <8>;
+	};
+};
+
+&smi0 {
+	status = "okay";
+
+	phy4: ethernet-phy@4 {
+		device_type = "ethernet-phy";
+		interrupts = <17 8>;
+		interrupt-parent = <&gpio>;
+		compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+		reg = <4>;
+		sfp = <&sfp>;
+	};
+
+	phy5: ethernet-phy@5 {
+		device_type = "ethernet-phy";
+		interrupts = <17 8>;
+		interrupt-parent = <&gpio>;
+		compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+		reg = <5>;
+	};
+
+	phy6: ethernet-phy@6 {
+		device_type = "ethernet-phy";
+		interrupts = <17 8>;
+		interrupt-parent = <&gpio>;
+		compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+		reg = <6>;
+	};
+
+	phy7: ethernet-phy@7 {
+		device_type = "ethernet-phy";
+		interrupts = <17 8>;
+		interrupt-parent = <&gpio>;
+		compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
+		reg = <7>;
+	};
+};
+
+&pip {
+	status = "okay";
+
+	interface@0 {
+		status = "okay";
+
+		ethernet@1 {
+			label = "lan0";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy5>;
+			nvmem-cells = <&macaddr_eeprom_0 1>;
+			nvmem-cell-names = "mac-address";
+		};
+
+		ethernet@2 {
+			label = "lan1";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy6>;
+			nvmem-cells = <&macaddr_eeprom_0 2>;
+			nvmem-cell-names = "mac-address";
+		};
+
+		ethernet@3 {
+			label = "lan2";
+			status = "okay";
+			phy-mode = "sgmii";
+			phy-handle = <&phy7>;
+			nvmem-cells = <&macaddr_eeprom_0 3>;
+			nvmem-cell-names = "mac-address";
+		};
+	};
+};

target/linux/octeon/files/arch/mips/boot/dts/cavium-octeon/cn71xx.dtsi

@@ -0,0 +1,357 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/dts-v1/;
+
+/ {
+	compatible = "cavium,cn71xx";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&ciu>;
+
+	soc {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		ranges;
+
+		bootbus@1180000000000 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			compatible = "cavium,octeon-3860-bootbus";
+			reg = <0x11800 0x00 0x00 0x200>;
+			ranges = <0x00 0x00 0x10000 0x10000000 0x00>,
+				 <0x01 0x00 0x10000 0x20000000 0x00>,
+				 <0x02 0x00 0x10000 0x30000000 0x00>,
+				 <0x03 0x00 0x10000 0x40000000 0x00>,
+				 <0x04 0x00 0x10000 0x50000000 0x00>,
+				 <0x05 0x00 0x10000 0x60000000 0x00>,
+				 <0x06 0x00 0x10000 0x70000000 0x00>,
+				 <0x07 0x00 0x10000 0x80000000 0x00>;
+		};
+
+		dma0: dma-engine@1180000000100 {
+			status = "disabled";
+			compatible = "cavium,octeon-5750-bootbus-dma";
+			reg = <0x11800 0x100 0x0 0x08>;
+			interrupts = <0 63>;
+		};
+
+		dma1: dma-engine@1180000000108 {
+			status = "disabled";
+			compatible = "cavium,octeon-5750-bootbus-dma";
+			reg = <0x11800 0x108 0x0 0x08>;
+			interrupts = <0 63>;
+		};
+
+		ciu: interrupt-controller@1070000000000 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-3860-ciu";
+			reg = <0x10700 0x00000000 0x0 0x7000>;
+			interrupt-controller;
+		};
+
+		cib0: interrupt-controller@107000000e000 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xe000 0x0 0x08>, /* RAW */
+			      <0x10700 0xe100 0x0 0x08>; /* EN */
+			cavium,max-bits = <23>;
+			interrupts = <1 24>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		cib1: interrupt-controller@107000000e200 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xe200 0x0 0x08>, /* RAW */
+			      <0x10700 0xe300 0x0 0x08>; /* EN */
+			cavium,max-bits = <12>;
+			interrupts = <1 52>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		cib2: interrupt-controller@107000000e400 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xe400 0x0 0x08>, /* RAW */
+			      <0x10700 0xe500 0x0 0x08>; /* EN */
+			cavium,max-bits = <6>;
+			interrupts = <1 63>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		cib3: interrupt-controller@107000000e600 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xe600 0x0 0x08>, /* RAW */
+			      <0x10700 0xe700 0x0 0x08>; /* EN */
+			cavium,max-bits = <4>;
+			interrupts = <2 16>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		cib4: interrupt-controller@107000000e800 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xe800 0x0 0x08>, /* RAW */
+			      <0x10700 0xea00 0x0 0x08>; /* EN */
+			cavium,max-bits = <11>;
+			interrupts = <1 33>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		cib5: interrupt-controller@107000000e900 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xe900 0x00 0x08>, /* RAW */
+			      <0x10700 0xeb00 0x00 0x08>; /* EN */
+			cavium,max-bits = <11>;
+			interrupts = <1 23>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		cib6: interrupt-controller@107000000ec00 {
+			#interrupt-cells = <2>;
+			compatible = "cavium,octeon-7130-cib";
+			reg = <0x10700 0xec00 0x0 0x08>, /* RAW */
+			      <0x10700 0xee00 0x0 0x08>; /* EN */
+			cavium,max-bits = <15>;
+			interrupts = <2 17>;
+			interrupt-parent = <&ciu>;
+			interrupt-controller;
+		};
+
+		gpio: gpio-controller@1070000000800 {
+			#interrupt-cells = <2>;
+			#gpio-cells = <2>;
+			compatible = "cavium,octeon-3860-gpio";
+			reg = <0x10700 0x800 0x0 0x100>;
+			interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
+				     <0 20>, <0 21>, <0 22>, <0 23>,
+				     <0 24>, <0 25>, <0 26>, <0 27>,
+				     <0 28>, <0 29>, <0 30>, <0 31>;
+			interrupt-controller;
+			gpio-controller;
+		};
+
+		mmc: mmc@1180000002000 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-6130-mmc";
+			reg = <0x11800 0x2000 0x0 0x100>,
+			      <0x11800 0x168 0x0 0x20>;
+			interrupts = <1 19>, <0 63>;
+		};
+
+		smi0: mdio@1180000001800 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3860-mdio";
+			reg = <0x11800 0x1800 0x0 0x40>;
+		};
+
+		smi1: mdio@1180000001900 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3860-mdio";
+			reg = <0x11800 0x1900 0x0 0x40>;
+		};
+
+		pip: pip@11800a0000000 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3860-pip";
+			reg = <0x11800 0xa0000000 0x0 0x2000>;
+
+			interface@0 {
+				status = "disabled";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "cavium,octeon-3860-pip-interface";
+				reg = <0>; /* Interface */
+
+				ethernet@0 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0>; /* Port */
+				};
+
+				ethernet@1 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <1>; /* Port */
+				};
+
+				ethernet@2 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <2>; /* Port */
+				};
+
+				ethernet@3 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <3>; /* Port */
+				};
+			};
+
+			interface@1 {
+				status = "disabled";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "cavium,octeon-3860-pip-interface";
+				reg = <1>; /* Interface */
+
+				ethernet@0 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <0>; /* Port */
+				};
+
+				ethernet@1 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <1>; /* Port */
+				};
+
+				ethernet@2 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <2>; /* Port */
+				};
+
+				ethernet@3 {
+					status = "disabled";
+					compatible = "cavium,octeon-3860-pip-port";
+					reg = <3>; /* Port */
+				};
+			};
+		};
+
+		twsi0: i2c@1180000001000 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3860-twsi";
+			reg = <0x11800 0x1000 0x0 0x200>;
+			interrupts = <0 45>;
+			clock-frequency = <100000>;
+		};
+
+		twsi1: i2c@1180000001200 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3860-twsi";
+			reg = <0x11800 0x1200 0x0 0x200>;
+			interrupts = <0 59>;
+			clock-frequency = <100000>;
+		};
+
+		uctl@118006c000000 {
+			status = "disabled";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			compatible = "cavium,octeon-7130-sata-uctl";
+			reg = <0x11800 0x6c000000 0x00 0x100>;
+			ranges;
+
+			sata@16c0000000000 {
+				status = "disabled";
+				compatible = "cavium,octeon-7130-ahci";
+				reg = <0x16c00 0x00 0x00 0x200>;
+				interrupt-parent = <&cib3>;
+				interrupts = <2 4>;
+			};
+		};
+
+		usb0: uctl@1180068000000 {
+			status = "disabled";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			compatible = "cavium,octeon-7130-usb-uctl";
+			reg = <0x11800 0x68000000 0x00 0x100>;
+			ranges;
+			power = <0x02 0x01 0x00>;
+			refclk-frequency = <100000000>;
+			refclk-type-hs = "pll_ref_clk";
+			refclk-type-ss = "dlmc_ref_clk1";
+
+			xhci0: xhci@1680000000000 {
+				status = "disabled";
+				compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
+				reg = <0x16800 0x0 0x10 0x00>;
+				interrupts = <9 4>;
+				interrupt-parent = <&cib4>;
+			};
+		};
+
+		usb1: uctl@1180069000000 {
+			status = "disabled";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			compatible = "cavium,octeon-7130-usb-uctl";
+			reg = <0x11800 0x69000000 0x00 0x100>;
+			ranges;
+			power = <0x02 0x02 0x01>;
+			refclk-frequency = <100000000>;
+			refclk-type-hs = "pll_ref_clk";
+			refclk-type-ss = "dlmc_ref_clk1";
+
+			xhci1: xhci@1690000000000 {
+				status = "disabled";
+				compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
+				reg = <0x16900 0x0 0x10 0x00>;
+				interrupts = <9 4>;
+				interrupt-parent = <&cib5>;
+			};
+		};
+
+		uart0: serial@1180000000800 {
+			status = "disabled";
+			compatible = "cavium,octeon-3860-uart", "ns16550";
+			reg = <0x11800 0x800 0x0 0x400>;
+			reg-shift = <3>;
+			interrupts = <0 34>;
+			clock-frequency = <400000000>;
+			current-speed = <115200>;
+		};
+
+		uart1: serial@1180000000c00 {
+			status = "disabled";
+			compatible = "cavium,octeon-3860-uart", "ns16550";
+			reg = <0x11800 0xc00 0x0 0x400>;
+			reg-shift = <3>;
+			interrupts = <0 35>;
+			clock-frequency = <400000000>;
+			current-speed = <115200>;
+		};
+
+		ocla0@11800a8000000 {
+			status = "disabled";
+			compatible = "cavium,octeon-7130-ocla";
+			reg = <0x11800 0xa8000000 0x0 0x500000>;
+			interrupts = <0x08 0x01 0x09 0x01 0x0b 0x01>;
+			interrupt-parent = <&cib6>;
+		};
+
+		spi: spi@1070000001000 {
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cavium,octeon-3010-spi";
+			reg = <0x10700 0x1000 0x00 0x100>;
+			interrupts = <0 58>;
+			spi-max-frequency = <100000000>;
+		};
+	};
+};

target/linux/octeon/generic/target.mk

@@ -0,0 +1 @@
+BOARDNAME:=Generic

target/linux/octeon/image/Makefile

@@ -0,0 +1,119 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2009-2010 OpenWrt.org
+
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+define Build/append-dtb-to-elf
+	$(TARGET_CROSS)objcopy --update-section .appended_dtb=$(KDIR)/image-$(DEVICE_DTS).dtb $@
+endef
+
+define Build/strip-kernel
+	# Workaround pre-SDK-1.9.0 u-boot versions not handling the .notes section
+	$(TARGET_CROSS)strip -R .notes $@ -o $@.stripped && mv $@.stripped $@
+endef
+
+DTS_DIR := $(DTS_DIR)/cavium-octeon
+
+define Device/Default
+  PROFILES = Default $$(DEVICE_NAME)
+  KERNEL_NAME := vmlinux.elf
+  KERNEL_INITRAMFS_NAME := vmlinux-initramfs.elf
+  KERNEL := kernel-bin | strip-kernel | patch-cmdline
+  IMAGES := sysupgrade.tar
+  IMAGE/sysupgrade.tar/squashfs := append-rootfs | pad-extra 128k | sysupgrade-tar rootfs=$$$$@
+  IMAGE/sysupgrade.tar := sysupgrade-tar
+endef
+
+define Device/generic
+  DEVICE_VENDOR := Generic
+  DEVICE_MODEL := Octeon
+  FILESYSTEMS := ext4
+endef
+TARGET_DEVICES += generic
+
+ITUSROUTER_CMDLINE:=console=ttyS0,115200 root=/dev/mmcblk1p2 rootfstype=squashfs,ext4,f2fs rootwait
+define Device/itus_shield-router
+  DEVICE_VENDOR := Itus Networks
+  DEVICE_MODEL := Shield Router
+  CMDLINE := $(ITUSROUTER_CMDLINE)
+  IMAGE/sysupgrade.tar/squashfs += | append-metadata
+endef
+TARGET_DEVICES += itus_shield-router
+
+# Disable PCIe on ER as it doesn't have PCIe peripherals and some devices lock up on initialization
+ER_CMDLINE:=-mtdparts=phys_mapped_flash:640k(boot0)ro,640k(boot1)ro,64k(eeprom)ro root=/dev/mmcblk0p2 rootfstype=squashfs,ext4 rootwait pcie_octeon.pcie_disable=1
+define Device/ubnt_edgerouter
+  DEVICE_VENDOR := Ubiquiti
+  DEVICE_MODEL := EdgeRouter
+  BOARD_NAME := er
+  CMDLINE := $(ER_CMDLINE)
+  SUPPORTED_DEVICES += er
+endef
+TARGET_DEVICES += ubnt_edgerouter
+
+define Device/ubnt_edgerouter-e300
+  DEVICE_VENDOR := Ubiquiti
+  DEVICE_PACKAGES += kmod-gpio-button-hotplug kmod-leds-gpio kmod-of-mdio kmod-sfp kmod-usb3 kmod-usb-dwc3 kmod-usb-storage-uas
+  KERNEL := kernel-bin | patch-cmdline | append-dtb-to-elf
+  KERNEL_DEPENDS := $$(wildcard $(DTS_DIR)/$(DEVICE_DTS).dts)
+  CMDLINE := root=/dev/mmcblk0p2 rootfstype=squashfs,ext4 rootwait
+endef
+
+define Device/ubnt_edgerouter-4
+  $(Device/ubnt_edgerouter-e300)
+  DEVICE_MODEL := EdgeRouter 4
+  DEVICE_DTS := cn7130_ubnt_edgerouter-4
+endef
+TARGET_DEVICES += ubnt_edgerouter-4
+
+define Device/ubnt_edgerouter-6p
+  $(Device/ubnt_edgerouter-e300)
+  DEVICE_MODEL := EdgeRouter 6P
+  DEVICE_DTS := cn7130_ubnt_edgerouter-6p
+endef
+TARGET_DEVICES += ubnt_edgerouter-6p
+
+ERLITE_CMDLINE:=-mtdparts=phys_mapped_flash:512k(boot0)ro,512k(boot1)ro,64k(eeprom)ro root=/dev/sda2 rootfstype=squashfs,ext4 rootwait
+define Device/ubnt_edgerouter-lite
+  DEVICE_VENDOR := Ubiquiti
+  DEVICE_MODEL := EdgeRouter Lite
+  BOARD_NAME := erlite
+  CMDLINE := $(ERLITE_CMDLINE)
+  SUPPORTED_DEVICES += erlite
+endef
+TARGET_DEVICES += ubnt_edgerouter-lite
+
+define Device/ubnt_unifi-usg
+  $(Device/ubnt_edgerouter-lite)
+  DEVICE_MODEL := UniFi Security Gateway
+  BOARD_NAME := ubnt,usg
+  DEVICE_PACKAGES += kmod-gpio-button-hotplug kmod-leds-gpio
+  DEVICE_DTS := cn5020_ubnt_usg
+  KERNEL += | append-dtb-to-elf
+endef
+TARGET_DEVICES += ubnt_unifi-usg
+
+define Device/cisco_vedge1000
+  DEVICE_VENDOR := Cisco Viptela
+  DEVICE_MODEL := vEdge 1000
+  BOARD_NAME := cisco,vedge1000
+  DEVICE_PACKAGES += \
+	blkid \
+	kmod-hwmon-jc42 \
+	kmod-hwmon-max6697 \
+	kmod-of-mdio \
+	kmod-rtc-ds1307 \
+	kmod-usb-dwc3 \
+	kmod-usb-storage-uas \
+	kmod-usb3 \
+	sfdisk \
+	uboot-envtools
+  KERNEL := kernel-bin | append-dtb-elf
+  KERNEL_DEPENDS := $$(wildcard $(DTS_DIR)/$(DEVICE_DTS).dts)
+  DEVICE_DTS := cn6130_cisco_vedge1000
+endef
+TARGET_DEVICES += cisco_vedge1000
+
+$(eval $(call BuildImage))

target/linux/octeon/patches-6.6/100-mips_image_cmdline_hack.patch

@@ -0,0 +1,38 @@
+From: John Crispin <john@phrozen.org>
+Subject: hack: kernel: add generic image_cmdline hack to MIPS targets
+
+lede-commit: d59f5b3a987a48508257a0ddbaeadc7909f9f976
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ arch/mips/Kconfig       | 4 ++++
+ arch/mips/kernel/head.S | 6 ++++++
+ 2 files changed, 10 insertions(+)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -1090,6 +1090,10 @@ config MIPS_MSC
+ config SYNC_R4K
+ 	bool
+ 
++config IMAGE_CMDLINE_HACK
++	bool "OpenWrt specific image command line hack"
++	default n
++
+ config NO_IOPORT_MAP
+ 	def_bool n
+ 
+--- a/arch/mips/kernel/head.S
++++ b/arch/mips/kernel/head.S
+@@ -79,6 +79,12 @@ FEXPORT(__kernel_entry)
+ 	j	kernel_entry
+ #endif /* CONFIG_BOOT_RAW */
+ 
++#ifdef CONFIG_IMAGE_CMDLINE_HACK
++	.ascii	"CMDLINE:"
++EXPORT(__image_cmdline)
++	.fill	0x400
++#endif /* CONFIG_IMAGE_CMDLINE_HACK */
++
+ 	__REF
+ 
+ NESTED(kernel_entry, 16, sp)			# kernel entry point

target/linux/octeon/patches-6.6/100-ubnt_edgerouter2_support.patch

@@ -0,0 +1,11 @@
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
++++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+@@ -174,6 +174,8 @@ int cvmx_helper_board_get_mii_address(in
+ 			return 7 - ipd_port;
+ 		else
+ 			return -1;
++	case CVMX_BOARD_TYPE_UBNT_E200:
++		return -1;
+ 	case CVMX_BOARD_TYPE_KONTRON_S1901:
+ 		if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT)
+ 			return 1;

target/linux/octeon/patches-6.6/110-er200-ethernet_probe_order.patch

@@ -0,0 +1,34 @@
+--- a/drivers/staging/octeon/ethernet.c
++++ b/drivers/staging/octeon/ethernet.c
+@@ -676,6 +676,7 @@ static int cvm_oct_probe(struct platform
+ 	int interface;
+ 	int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
+ 	int qos;
++	int i;
+ 	struct device_node *pip;
+ 	int mtu_overhead = ETH_HLEN + ETH_FCS_LEN;
+ 
+@@ -797,13 +798,19 @@ static int cvm_oct_probe(struct platform
+ 	}
+ 
+ 	num_interfaces = cvmx_helper_get_number_of_interfaces();
+-	for (interface = 0; interface < num_interfaces; interface++) {
+-		cvmx_helper_interface_mode_t imode =
+-		    cvmx_helper_interface_get_mode(interface);
+-		int num_ports = cvmx_helper_ports_on_interface(interface);
++	for (i = 0; i < num_interfaces; i++) {
++		cvmx_helper_interface_mode_t imode;
++		int interface;
++		int num_ports;
+ 		int port;
+ 		int port_index;
+ 
++		interface = i;
++		if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_UBNT_E200)
++			interface = num_interfaces - (i + 1);
++
++		num_ports = cvmx_helper_ports_on_interface(interface);
++		imode = cvmx_helper_interface_get_mode(interface);
+ 		for (port_index = 0,
+ 		     port = cvmx_helper_get_ipd_port(interface, 0);
+ 		     port < cvmx_helper_get_ipd_port(interface, num_ports);

target/linux/octeon/patches-6.6/120-cmdline-hack.patch

@@ -0,0 +1,47 @@
+--- a/arch/mips/cavium-octeon/setup.c
++++ b/arch/mips/cavium-octeon/setup.c
+@@ -653,6 +653,35 @@ void octeon_user_io_init(void)
+ 	write_c0_derraddr1(0);
+ }
+ 
++#ifdef CONFIG_IMAGE_CMDLINE_HACK
++extern char __image_cmdline[];
++
++static int __init octeon_use_image_cmdline(void)
++{
++       char *p = __image_cmdline;
++       int replace = 0;
++
++       if (*p == '-') {
++               replace = 1;
++               p++;
++       }
++
++       if (*p == '\0')
++               return 0;
++
++       if (replace) {
++               strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline));
++       } else {
++               strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
++               strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
++       }
++
++       return 1;
++}
++#else
++static inline int octeon_use_image_cmdline(void) { return 0; }
++#endif
++
+ /**
+  * prom_init - Early entry point for arch setup
+  */
+@@ -896,6 +925,8 @@ void __init prom_init(void)
+ 		}
+ 	}
+ 
++	octeon_use_image_cmdline();
++
+ 	if (strstr(arcs_cmdline, "console=") == NULL) {
+ 		if (octeon_uart == 1)
+ 			strcat(arcs_cmdline, " console=ttyS1,115200");

target/linux/octeon/patches-6.6/130-add_itus_support.patch

@@ -0,0 +1,42 @@
+--- a/arch/mips/cavium-octeon/octeon-platform.c
++++ b/arch/mips/cavium-octeon/octeon-platform.c
+@@ -775,7 +775,7 @@ int __init octeon_prune_device_tree(void
+ 	if (fdt_check_header(initial_boot_params))
+ 		panic("Corrupt Device Tree.");
+ 
+-	WARN(octeon_bootinfo->board_type == CVMX_BOARD_TYPE_CUST_DSR1000N,
++	WARN(octeon_bootinfo->board_type == CVMX_BOARD_TYPE_ITUS_SHIELD,
+ 	     "Built-in DTB booting is deprecated on %s. Please switch to use appended DTB.",
+ 	     cvmx_board_type_to_string(octeon_bootinfo->board_type));
+ 
+--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
++++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+@@ -298,7 +298,7 @@ enum cvmx_board_types_enum {
+ 	CVMX_BOARD_TYPE_UBNT_E100 = 20002,
+ 	CVMX_BOARD_TYPE_UBNT_E200 = 20003,
+ 	CVMX_BOARD_TYPE_UBNT_E220 = 20005,
+-	CVMX_BOARD_TYPE_CUST_DSR1000N = 20006,
++	CVMX_BOARD_TYPE_ITUS_SHIELD = 20006,
+ 	CVMX_BOARD_TYPE_UBNT_E300 = 20300,
+ 	CVMX_BOARD_TYPE_KONTRON_S1901 = 21901,
+ 	CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
+@@ -403,7 +403,7 @@ static inline const char *cvmx_board_typ
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
+-		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N)
++		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_ITUS_SHIELD)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E300)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
+--- a/arch/mips/pci/pci-octeon.c
++++ b/arch/mips/pci/pci-octeon.c
+@@ -211,7 +211,7 @@ const char *octeon_get_pci_interrupts(vo
+ 		return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA";
+ 	case CVMX_BOARD_TYPE_BBGW_REF:
+ 		return "AABCD";
+-	case CVMX_BOARD_TYPE_CUST_DSR1000N:
++	case CVMX_BOARD_TYPE_ITUS_SHIELD:
+ 		return "CCCCCCCCCCCCCCCCCCCCCCCCCCCCCCCC";
+ 	case CVMX_BOARD_TYPE_THUNDER:
+ 	case CVMX_BOARD_TYPE_EBH3000:

target/linux/octeon/patches-6.6/150-ubnt_usg_support.patch

@@ -0,0 +1,46 @@
+--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
++++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
+@@ -297,6 +297,7 @@ enum cvmx_board_types_enum {
+ 	CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
+ 	CVMX_BOARD_TYPE_UBNT_E100 = 20002,
+ 	CVMX_BOARD_TYPE_UBNT_E200 = 20003,
++	CVMX_BOARD_TYPE_UBNT_USG = 20004,
+ 	CVMX_BOARD_TYPE_UBNT_E220 = 20005,
+ 	CVMX_BOARD_TYPE_ITUS_SHIELD = 20006,
+ 	CVMX_BOARD_TYPE_UBNT_E300 = 20300,
+@@ -401,6 +402,7 @@ static inline const char *cvmx_board_typ
+ 		    /* Customer private range */
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
++		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_USG)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
+ 		ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_ITUS_SHIELD)
+--- a/arch/mips/cavium-octeon/octeon-platform.c
++++ b/arch/mips/cavium-octeon/octeon-platform.c
+@@ -636,6 +636,7 @@ static void __init octeon_rx_tx_delay(in
+ 		}
+ 		break;
+ 	case CVMX_BOARD_TYPE_UBNT_E100:
++	case CVMX_BOARD_TYPE_UBNT_USG:
+ 		if (iface == 0 && port <= 2) {
+ 			_octeon_rx_tx_delay(eth, 0x0, 0x10);
+ 			return;
+--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
++++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+@@ -170,6 +170,7 @@ int cvmx_helper_board_get_mii_address(in
+ 		else
+ 			return -1;
+ 	case CVMX_BOARD_TYPE_UBNT_E100:
++	case CVMX_BOARD_TYPE_UBNT_USG:
+ 		if (ipd_port >= 0 && ipd_port <= 2)
+ 			return 7 - ipd_port;
+ 		else
+@@ -337,6 +338,7 @@ enum cvmx_helper_board_usb_clock_types _
+ 	case CVMX_BOARD_TYPE_LANAI2_G:
+ 	case CVMX_BOARD_TYPE_NIC10E_66:
+ 	case CVMX_BOARD_TYPE_UBNT_E100:
++	case CVMX_BOARD_TYPE_UBNT_USG:
+ 		return USB_CLOCK_TYPE_CRYSTAL_12;
+ 	case CVMX_BOARD_TYPE_NIC10E:
+ 		return USB_CLOCK_TYPE_REF_12;

target/linux/octeon/patches-6.6/700-allocate_interface_by_label.patch

@@ -0,0 +1,37 @@
+From: Roman Kuzmitskii <damex.pp@icloud.com>
+Date: Wed, 28 Oct 2020 19:00:00 +0000
+Subject: [PATCH] staging: octeon: add net-labels support
+
+With this patch, device name can be set within dts file
+in the same way as dsa port can.
+
+Add label to pip interface node to use this feature:
+label = "lan0";
+
+Tested-by: Johannes Kimmel <fff@bareminimum.eu>
+Signed-off-by: Roman Kuzmitskii <damex.pp@icloud.com>
+--- a/drivers/staging/octeon/ethernet.c
++++ b/drivers/staging/octeon/ethernet.c
+@@ -407,8 +407,12 @@ static int cvm_oct_common_set_mac_addres
+ int cvm_oct_common_init(struct net_device *dev)
+ {
+ 	struct octeon_ethernet *priv = netdev_priv(dev);
++	const u8 *label = NULL;
+ 	int ret;
+ 
++	if (priv->of_node)
++		label = of_get_property(priv->of_node, "label", NULL);
++
+ 	ret = of_get_ethdev_address(priv->of_node, dev);
+ 	if (ret)
+ 		eth_hw_addr_random(dev);
+@@ -441,6 +445,9 @@ int cvm_oct_common_init(struct net_devic
+ 	if (dev->netdev_ops->ndo_stop)
+ 		dev->netdev_ops->ndo_stop(dev);
+ 
++	if (!IS_ERR_OR_NULL(label))
++		dev_alloc_name(dev, label);
++
+ 	return 0;
+ }
+ 

target/linux/octeon/patches-6.6/701-honor_sgmii_node_device_tree_status.patch

@@ -0,0 +1,27 @@
+From: Roman Kuzmitskii <damex.pp@icloud.com>
+Date: Sun, 01 Nov 2020 19:00:00 +0000
+Subject: [PATCH] staging: octeon: sgmii to honor disabled dt node status
+
+With this patch, sgmii interface device tree node could be disabled and
+that disabled interface will not be unnecessarily initialized.
+
+It solves the problem with Octeon boards that have 8 sgmii or more ports
+initialized but have nothing connected to them.
+
+Tested-by: Johannes Kimmel <fff@bareminimum.eu>
+Signed-off-by: Roman Kuzmitskii <damex.pp@icloud.com>
+--- a/drivers/staging/octeon/ethernet.c
++++ b/drivers/staging/octeon/ethernet.c
+@@ -877,8 +877,10 @@ static int cvm_oct_probe(struct platform
+ 
+ 			case CVMX_HELPER_INTERFACE_MODE_SGMII:
+ 				priv->phy_mode = PHY_INTERFACE_MODE_SGMII;
+-				dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
+-				strscpy(dev->name, "eth%d", sizeof(dev->name));
++				if (of_device_is_available(priv->of_node)) {
++					dev->netdev_ops = &cvm_oct_sgmii_netdev_ops;
++					strscpy(dev->name, "eth%d", sizeof(dev->name));
++				}
+ 				break;
+ 
+ 			case CVMX_HELPER_INTERFACE_MODE_SPI:

target/linux/octeon/profiles/000-Generic.mk

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Copyright (C) 2013 OpenWrt.org
+
+define Profile/Generic
+  NAME:=Octeon SoC
+endef
+
+define Profile/Generic/Description
+   Base packages for Octeon boards.
+endef
+
+$(eval $(call Profile,Generic))