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This commit is contained in:
domenico
@@ -0,0 +1,97 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
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||||
/*
|
||||
* Device tree source for Ubiquity UniFi Security Gateway.
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||||
*
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* Written for EdgeRouter Lite by: Aaro Koskinen <aaro.koskinen@iki.fi>
|
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* Adapted for USG by: Clemens Hopfer <openwrt@wireloss.net>
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*/
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||||
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||||
/include/ "octeon_3xxx.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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||||
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/ {
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||||
compatible = "ubnt,usg";
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model = "Ubiquiti UniFi Security Gateway";
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||||
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||||
soc@0 {
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smi0: mdio@1180000001800 {
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phy5: ethernet-phy@5 {
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reg = <5>;
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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phy6: ethernet-phy@6 {
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reg = <6>;
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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phy7: ethernet-phy@7 {
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reg = <7>;
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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};
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pip: pip@11800a0000000 {
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interface@0 {
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ethernet@0 {
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phy-handle = <&phy7>;
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rx-delay = <0>;
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tx-delay = <0x10>;
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};
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ethernet@1 {
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phy-handle = <&phy6>;
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rx-delay = <0>;
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tx-delay = <0x10>;
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};
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ethernet@2 {
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phy-handle = <&phy5>;
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rx-delay = <0>;
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tx-delay = <0x10>;
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};
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};
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};
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uart0: serial@1180000000800 {
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clock-frequency = <500000000>;
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};
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usbn: usbn@1180068000000 {
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refclk-frequency = <12000000>;
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refclk-type = "crystal";
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};
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};
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leds {
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compatible = "gpio-leds";
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led_dome_white: led-0 {
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label = "white:dome";
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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};
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led_dome_blue: led-1 {
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label = "blue:dome";
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gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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key-restart {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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aliases {
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pip = &pip;
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led-boot = &led_dome_white;
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led-failsafe = &led_dome_blue;
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led-running = &led_dome_blue;
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led-upgrade = &led_dome_blue;
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};
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};
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@@ -0,0 +1,291 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/include/ "octeon_3xxx.dtsi"
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/ {
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compatible = "cisco,vedge1000", "cavium,cn6130";
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model = "Cisco/Viptela vEdge 1000";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&ciu>;
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soc@0 {
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smi0: mdio@1180000001800 {
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mgmtphy: ethernet-phy@0 {
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reg = <0x00>;
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};
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};
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mgmt0: ethernet@1070000100000 {
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compatible = "cavium,octeon-5750-mix";
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reg = <0x10700 0x100000 0x00 0x100>,
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<0x11800 0xe0000000 0x00 0x300>,
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<0x11800 0xe0000400 0x00 0x400>,
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<0x11800 0xe0002000 0x00 0x08>;
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cell-index = <0x00>;
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interrupts = <0x00 0x3e 0x01 0x2e>;
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nvmem-cells = <&macaddr_eeprom 0>;
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nvmem-cell-names = "mac-address";
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phy-handle = <&mgmtphy>;
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};
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pip: pip@11800a0000000 {
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interface@0 {
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ethernet@0 {
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nvmem-cells = <&macaddr_eeprom 3>;
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nvmem-cell-names = "mac-address";
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label = "lan2";
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/delete-property/ local-mac-address;
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};
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ethernet@1 {
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nvmem-cells = <&macaddr_eeprom 4>;
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nvmem-cell-names = "mac-address";
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label = "lan3";
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/delete-property/ local-mac-address;
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};
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ethernet@2 {
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nvmem-cells = <&macaddr_eeprom 1>;
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nvmem-cell-names = "mac-address";
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label = "lan0";
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/delete-property/ local-mac-address;
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};
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ethernet@3 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x3>;
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nvmem-cells = <&macaddr_eeprom 2>;
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nvmem-cell-names = "mac-address";
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label = "lan1";
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};
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};
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interface@1 {
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ethernet@0 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x0>;
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nvmem-cells = <&macaddr_eeprom 7>;
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nvmem-cell-names = "mac-address";
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label = "lan6";
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};
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ethernet@1 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x1>;
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nvmem-cells = <&macaddr_eeprom 8>;
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nvmem-cell-names = "mac-address";
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label = "lan7";
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};
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ethernet@2 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x2>;
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nvmem-cells = <&macaddr_eeprom 5>;
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nvmem-cell-names = "mac-address";
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label = "lan4";
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};
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ethernet@3 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x3>;
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nvmem-cells = <&macaddr_eeprom 6>;
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nvmem-cell-names = "mac-address";
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label = "lan5";
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};
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};
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};
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twsi0: i2c@1180000001000 {
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clock-frequency = <400000>;
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jc42@18 {
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compatible = "jedec,jc-42.4-temp";
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reg = <0x18>;
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};
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};
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twsi2: i2c@1180000001200 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "cavium,octeon-3860-twsi";
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reg = <0x11800 0x1200 0x00 0x200>;
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interrupts = <0x00 0x3b>;
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clock-frequency = <400000>;
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tmp@4c {
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compatible = "maxim,max6699";
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reg = <0x4c>;
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};
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rtc@6f {
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compatible = "microchip,mcp7941x";
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reg = <0x6f>;
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};
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tlv-eeprom@54 {
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compatible = "atmel,24c512";
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reg = <0x54>;
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pagesize = <0x80>;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_eeprom: mac-address@8 {
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compatible = "mac-base";
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reg = <0x8 6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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};
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uart0: serial@1180000000800 {
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clock-frequency = <600000000>;
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current-speed = <115200>;
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};
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uart1: serial@1180000000c00 {
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compatible = "cavium,octeon-3860-uart", "ns16550";
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reg = <0x11800 0xc00 0x00 0x400>;
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reg-shift = <0x03>;
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interrupts = <0x00 0x23>;
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clock-frequency = <600000000>;
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current-speed = <115200>;
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};
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mmc0: mmc@1180000002000 {
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compatible = "cavium,octeon-6130-mmc";
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reg = <0x11800 0x2000 0x00 0x100 0x11800 0x168 0x00 0x20>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x01 0x13 0x00 0x3f>;
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mmc-slot@0 {
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compatible = "cavium,octeon-6130-mmc-slot";
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reg = <0x00>;
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voltage-ranges = <0xce4 0xce4>;
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max-frequency = <0x3197500>;
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wp-gpios = <&gpio 0x02 0x00>;
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cd-gpios = <&gpio 0x03 0x01>;
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cavium,bus-max-width = <0x04>;
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};
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};
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bootbus: bootbus@1180000000000 {
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compatible = "cavium,octeon-3860-bootbus";
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reg = <0x11800 0x00 0x00 0x200>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x00 0x1ec00000 0x1400000>,
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<1 0 0x10000 0x20000000 0x00>,
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<2 0 0x10000 0x30000000 0x00>,
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<3 0 0x10000 0x40000000 0x00>,
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<4 0 0x10000 0x50000000 0x00>,
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<5 0 0x10000 0x60000000 0x00>,
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<6 0 0x00 0x1e000000 0x10000>,
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<7 0 0x10000 0x80000000 0x00>;
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||||
cavium,cs-config@0 {
|
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compatible = "cavium,octeon-3860-bootbus-config";
|
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cavium,cs-index = <0x00>;
|
||||
cavium,t-adr = <0x0a>;
|
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cavium,t-ce = <0x32>;
|
||||
cavium,t-oe = <0x32>;
|
||||
cavium,t-we = <0x23>;
|
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cavium,t-rd-hld = <0x19>;
|
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cavium,t-wr-hld = <0x23>;
|
||||
cavium,t-pause = <0x00>;
|
||||
cavium,t-wait = <0x12c>;
|
||||
cavium,t-page = <0x19>;
|
||||
cavium,t-rd-dly = <0x00>;
|
||||
cavium,t-ale = <0x03>;
|
||||
cavium,pages = <0x00>;
|
||||
cavium,bus-width = <0x10>;
|
||||
};
|
||||
|
||||
/delete-node/ cavium,cs-config@1;
|
||||
/delete-node/ cavium,cs-config@2;
|
||||
/delete-node/ cavium,cs-config@3;
|
||||
/delete-node/ cavium,cs-config@4;
|
||||
/delete-node/ cavium,cs-config@5;
|
||||
|
||||
cavium,cs-config@6 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <0x06>;
|
||||
cavium,t-adr = <0x0a>;
|
||||
cavium,t-ce = <0x0a>;
|
||||
cavium,t-oe = <0xa0>;
|
||||
cavium,t-we = <0x64>;
|
||||
cavium,t-rd-hld = <0x00>;
|
||||
cavium,t-wr-hld = <0x00>;
|
||||
cavium,t-pause = <0x32>;
|
||||
cavium,t-wait = <0x12c>;
|
||||
cavium,t-page = <0x12c>;
|
||||
cavium,t-rd-dly = <0x0a>;
|
||||
cavium,t-ale = <0x3f>;
|
||||
cavium,pages = <0x00>;
|
||||
cavium,bus-width = <0x08>;
|
||||
/delete-property/ cavium,wait-mode;
|
||||
};
|
||||
|
||||
flash0: nor@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x00 0x00 0x1000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "bootloader";
|
||||
reg = <0x00 0x200000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@fe0000 {
|
||||
label = "environment";
|
||||
reg = <0xfe0000 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpld: cpld@6,0 {
|
||||
compatible = "cisco,n821-cpld", "syscon", "simple-mfd";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg-io-width = <1>; // Syscon uses 4-byte accesses by default
|
||||
|
||||
reg = <0x06 0x00 0x28>; // This is the regmap to be defined for syscon devices..
|
||||
ranges = <0 0x06 0x0 0x50>; // .. and this is the addresses to map general subdevices on
|
||||
};
|
||||
};
|
||||
|
||||
uctl@118006f000000 {
|
||||
compatible = "cavium,octeon-6335-uctl";
|
||||
reg = <0x11800 0x6f000000 0x00 0x100>;
|
||||
ranges;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
refclk-frequency = <0xb71b00>;
|
||||
refclk-type = "crystal";
|
||||
|
||||
ehci@16f0000000000 {
|
||||
compatible = "cavium,octeon-6335-ehci", "usb-ehci";
|
||||
reg = <0x16f00 0x00 0x00 0x100>;
|
||||
interrupts = <0x00 0x38>;
|
||||
big-endian-regs;
|
||||
};
|
||||
|
||||
ohci@16f0000000400 {
|
||||
compatible = "cavium,octeon-6335-ohci", "usb-ohci";
|
||||
reg = <0x16f00 0x400 0x00 0x100>;
|
||||
interrupts = <0x00 0x38>;
|
||||
big-endian-regs;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,21 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "cn7130_ubnt_edgerouter-e300.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ubnt,edgerouter-4", "cavium,cn7130";
|
||||
model = "Ubiquiti EdgeRouter 4";
|
||||
};
|
||||
|
||||
&pip {
|
||||
interface@0 {
|
||||
ethernet@0 {
|
||||
label = "lan3";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy4>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,62 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "cn7130_ubnt_edgerouter-e300.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "ubnt,edgerouter-6p", "cavium,cn7130";
|
||||
model = "Ubiquiti EdgeRouter 6P";
|
||||
};
|
||||
|
||||
&smi0 {
|
||||
phy8: ethernet-phy@8 {
|
||||
device_type = "ethernet-phy";
|
||||
interrupts = <17 8>;
|
||||
interrupt-parent = <&gpio>;
|
||||
compatible = "vitesse,vsc8514", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <8>;
|
||||
};
|
||||
|
||||
phy9: ethernet-phy@9 {
|
||||
device_type = "ethernet-phy";
|
||||
interrupts = <17 8>;
|
||||
interrupt-parent = <&gpio>;
|
||||
compatible = "vitesse,vsc8514", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <9>;
|
||||
};
|
||||
};
|
||||
|
||||
&pip {
|
||||
interface@0 {
|
||||
ethernet@0 {
|
||||
label = "lan5";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy4>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
|
||||
interface@1 {
|
||||
status = "okay";
|
||||
|
||||
ethernet@0 {
|
||||
label = "lan3";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy8>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 4>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
ethernet@1 {
|
||||
label = "lan4";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy9>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 5>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,226 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "cn71xx.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
|
||||
/ {
|
||||
compatible = "ubnt,edgerouter-e300", "cavium,cn7130";
|
||||
model = "Ubiquiti EdgeRouter E300 series";
|
||||
|
||||
aliases {
|
||||
/* White + Blinking Blue */
|
||||
led-boot = &led_power_white;
|
||||
/* Blue + Blinking White */
|
||||
led-failsafe = &led_power_blue;
|
||||
/* Constant Blue */
|
||||
led-running = &led_power_blue;
|
||||
/* Blue + Blinking White */
|
||||
led-upgrade = &led_power_blue;
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x00000000>,
|
||||
<0x0 0x10000000>,
|
||||
<0x0 0x20000000>,
|
||||
<0x0 0x30000000>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_power_blue: power_blue {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_BLUE>;
|
||||
gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
led_power_white: power_white {
|
||||
function = LED_FUNCTION_POWER;
|
||||
color = <LED_COLOR_ID_WHITE>;
|
||||
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys-polled";
|
||||
poll-interval = <20>;
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <60>;
|
||||
};
|
||||
};
|
||||
|
||||
sfp: sfp {
|
||||
compatible = "sff,sfp";
|
||||
i2c-bus = <&twsi0>;
|
||||
/* Pins 12, 13 and 14 gets pulled low when SFP is plugged in */
|
||||
mod-def0-gpio = <&gpio 12 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xhci0 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&twsi0 {
|
||||
status = "okay";
|
||||
|
||||
sfp_eeprom@50 {
|
||||
compatible = "at,24c04";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
sfp_eeprom@51 {
|
||||
compatible = "at,24c04";
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "Macronix,mx25l6405d", "spi-flash";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <25000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "boot0";
|
||||
read-only;
|
||||
reg = <0x000000 0x300000>;
|
||||
};
|
||||
|
||||
partition@300000 {
|
||||
label = "dummy";
|
||||
read-only;
|
||||
reg = <0x300000 0x100000>;
|
||||
};
|
||||
|
||||
partition@400000 {
|
||||
label = "eeprom";
|
||||
read-only;
|
||||
reg = <0x400000 0x10000>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_eeprom_0: macaddr@0 {
|
||||
compatible = "mac-base";
|
||||
reg = <0x0 0x6>;
|
||||
#nvmem-cell-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mmc {
|
||||
status = "okay";
|
||||
|
||||
mmc-slot@0 {
|
||||
compatible = "mmc-slot";
|
||||
reg = <0>;
|
||||
non-removable;
|
||||
max-frequency = <26000000>;
|
||||
voltage-ranges = <3300 3300>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
};
|
||||
|
||||
&smi0 {
|
||||
status = "okay";
|
||||
|
||||
phy4: ethernet-phy@4 {
|
||||
device_type = "ethernet-phy";
|
||||
interrupts = <17 8>;
|
||||
interrupt-parent = <&gpio>;
|
||||
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <4>;
|
||||
sfp = <&sfp>;
|
||||
};
|
||||
|
||||
phy5: ethernet-phy@5 {
|
||||
device_type = "ethernet-phy";
|
||||
interrupts = <17 8>;
|
||||
interrupt-parent = <&gpio>;
|
||||
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
phy6: ethernet-phy@6 {
|
||||
device_type = "ethernet-phy";
|
||||
interrupts = <17 8>;
|
||||
interrupt-parent = <&gpio>;
|
||||
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
phy7: ethernet-phy@7 {
|
||||
device_type = "ethernet-phy";
|
||||
interrupts = <17 8>;
|
||||
interrupt-parent = <&gpio>;
|
||||
compatible = "vitesse,vsc8504", "ethernet-phy-ieee802.3-c22";
|
||||
reg = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
&pip {
|
||||
status = "okay";
|
||||
|
||||
interface@0 {
|
||||
status = "okay";
|
||||
|
||||
ethernet@1 {
|
||||
label = "lan0";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy5>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 1>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
ethernet@2 {
|
||||
label = "lan1";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy6>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 2>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
ethernet@3 {
|
||||
label = "lan2";
|
||||
status = "okay";
|
||||
phy-mode = "sgmii";
|
||||
phy-handle = <&phy7>;
|
||||
nvmem-cells = <&macaddr_eeprom_0 3>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,357 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "cavium,cn71xx";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&ciu>;
|
||||
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "simple-bus";
|
||||
ranges;
|
||||
|
||||
bootbus@1180000000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cavium,octeon-3860-bootbus";
|
||||
reg = <0x11800 0x00 0x00 0x200>;
|
||||
ranges = <0x00 0x00 0x10000 0x10000000 0x00>,
|
||||
<0x01 0x00 0x10000 0x20000000 0x00>,
|
||||
<0x02 0x00 0x10000 0x30000000 0x00>,
|
||||
<0x03 0x00 0x10000 0x40000000 0x00>,
|
||||
<0x04 0x00 0x10000 0x50000000 0x00>,
|
||||
<0x05 0x00 0x10000 0x60000000 0x00>,
|
||||
<0x06 0x00 0x10000 0x70000000 0x00>,
|
||||
<0x07 0x00 0x10000 0x80000000 0x00>;
|
||||
};
|
||||
|
||||
dma0: dma-engine@1180000000100 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-5750-bootbus-dma";
|
||||
reg = <0x11800 0x100 0x0 0x08>;
|
||||
interrupts = <0 63>;
|
||||
};
|
||||
|
||||
dma1: dma-engine@1180000000108 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-5750-bootbus-dma";
|
||||
reg = <0x11800 0x108 0x0 0x08>;
|
||||
interrupts = <0 63>;
|
||||
};
|
||||
|
||||
ciu: interrupt-controller@1070000000000 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-3860-ciu";
|
||||
reg = <0x10700 0x00000000 0x0 0x7000>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib0: interrupt-controller@107000000e000 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe000 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xe100 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <23>;
|
||||
interrupts = <1 24>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib1: interrupt-controller@107000000e200 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe200 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xe300 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <12>;
|
||||
interrupts = <1 52>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib2: interrupt-controller@107000000e400 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe400 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xe500 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <6>;
|
||||
interrupts = <1 63>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib3: interrupt-controller@107000000e600 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe600 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xe700 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <4>;
|
||||
interrupts = <2 16>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib4: interrupt-controller@107000000e800 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe800 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xea00 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <11>;
|
||||
interrupts = <1 33>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib5: interrupt-controller@107000000e900 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xe900 0x00 0x08>, /* RAW */
|
||||
<0x10700 0xeb00 0x00 0x08>; /* EN */
|
||||
cavium,max-bits = <11>;
|
||||
interrupts = <1 23>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
cib6: interrupt-controller@107000000ec00 {
|
||||
#interrupt-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-cib";
|
||||
reg = <0x10700 0xec00 0x0 0x08>, /* RAW */
|
||||
<0x10700 0xee00 0x0 0x08>; /* EN */
|
||||
cavium,max-bits = <15>;
|
||||
interrupts = <2 17>;
|
||||
interrupt-parent = <&ciu>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
||||
gpio: gpio-controller@1070000000800 {
|
||||
#interrupt-cells = <2>;
|
||||
#gpio-cells = <2>;
|
||||
compatible = "cavium,octeon-3860-gpio";
|
||||
reg = <0x10700 0x800 0x0 0x100>;
|
||||
interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
|
||||
<0 20>, <0 21>, <0 22>, <0 23>,
|
||||
<0 24>, <0 25>, <0 26>, <0 27>,
|
||||
<0 28>, <0 29>, <0 30>, <0 31>;
|
||||
interrupt-controller;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
mmc: mmc@1180000002000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-6130-mmc";
|
||||
reg = <0x11800 0x2000 0x0 0x100>,
|
||||
<0x11800 0x168 0x0 0x20>;
|
||||
interrupts = <1 19>, <0 63>;
|
||||
};
|
||||
|
||||
smi0: mdio@1180000001800 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-mdio";
|
||||
reg = <0x11800 0x1800 0x0 0x40>;
|
||||
};
|
||||
|
||||
smi1: mdio@1180000001900 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-mdio";
|
||||
reg = <0x11800 0x1900 0x0 0x40>;
|
||||
};
|
||||
|
||||
pip: pip@11800a0000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-pip";
|
||||
reg = <0x11800 0xa0000000 0x0 0x2000>;
|
||||
|
||||
interface@0 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-pip-interface";
|
||||
reg = <0>; /* Interface */
|
||||
|
||||
ethernet@0 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <0>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@1 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <1>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@2 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <2>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@3 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <3>; /* Port */
|
||||
};
|
||||
};
|
||||
|
||||
interface@1 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-pip-interface";
|
||||
reg = <1>; /* Interface */
|
||||
|
||||
ethernet@0 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <0>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@1 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <1>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@2 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <2>; /* Port */
|
||||
};
|
||||
|
||||
ethernet@3 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-pip-port";
|
||||
reg = <3>; /* Port */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
twsi0: i2c@1180000001000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-twsi";
|
||||
reg = <0x11800 0x1000 0x0 0x200>;
|
||||
interrupts = <0 45>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
twsi1: i2c@1180000001200 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3860-twsi";
|
||||
reg = <0x11800 0x1200 0x0 0x200>;
|
||||
interrupts = <0 59>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
uctl@118006c000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-sata-uctl";
|
||||
reg = <0x11800 0x6c000000 0x00 0x100>;
|
||||
ranges;
|
||||
|
||||
sata@16c0000000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-ahci";
|
||||
reg = <0x16c00 0x00 0x00 0x200>;
|
||||
interrupt-parent = <&cib3>;
|
||||
interrupts = <2 4>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: uctl@1180068000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-usb-uctl";
|
||||
reg = <0x11800 0x68000000 0x00 0x100>;
|
||||
ranges;
|
||||
power = <0x02 0x01 0x00>;
|
||||
refclk-frequency = <100000000>;
|
||||
refclk-type-hs = "pll_ref_clk";
|
||||
refclk-type-ss = "dlmc_ref_clk1";
|
||||
|
||||
xhci0: xhci@1680000000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
|
||||
reg = <0x16800 0x0 0x10 0x00>;
|
||||
interrupts = <9 4>;
|
||||
interrupt-parent = <&cib4>;
|
||||
};
|
||||
};
|
||||
|
||||
usb1: uctl@1180069000000 {
|
||||
status = "disabled";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "cavium,octeon-7130-usb-uctl";
|
||||
reg = <0x11800 0x69000000 0x00 0x100>;
|
||||
ranges;
|
||||
power = <0x02 0x02 0x01>;
|
||||
refclk-frequency = <100000000>;
|
||||
refclk-type-hs = "pll_ref_clk";
|
||||
refclk-type-ss = "dlmc_ref_clk1";
|
||||
|
||||
xhci1: xhci@1690000000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-xhci", "synopsys,dwc3";
|
||||
reg = <0x16900 0x0 0x10 0x00>;
|
||||
interrupts = <9 4>;
|
||||
interrupt-parent = <&cib5>;
|
||||
};
|
||||
};
|
||||
|
||||
uart0: serial@1180000000800 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-uart", "ns16550";
|
||||
reg = <0x11800 0x800 0x0 0x400>;
|
||||
reg-shift = <3>;
|
||||
interrupts = <0 34>;
|
||||
clock-frequency = <400000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
uart1: serial@1180000000c00 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-3860-uart", "ns16550";
|
||||
reg = <0x11800 0xc00 0x0 0x400>;
|
||||
reg-shift = <3>;
|
||||
interrupts = <0 35>;
|
||||
clock-frequency = <400000000>;
|
||||
current-speed = <115200>;
|
||||
};
|
||||
|
||||
ocla0@11800a8000000 {
|
||||
status = "disabled";
|
||||
compatible = "cavium,octeon-7130-ocla";
|
||||
reg = <0x11800 0xa8000000 0x0 0x500000>;
|
||||
interrupts = <0x08 0x01 0x09 0x01 0x0b 0x01>;
|
||||
interrupt-parent = <&cib6>;
|
||||
};
|
||||
|
||||
spi: spi@1070000001000 {
|
||||
status = "disabled";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "cavium,octeon-3010-spi";
|
||||
reg = <0x10700 0x1000 0x00 0x100>;
|
||||
interrupts = <0 58>;
|
||||
spi-max-frequency = <100000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user