c06fb25d1f
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68 lines
1.4 KiB
Plaintext
68 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar934x.dtsi"
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/ {
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compatible = "qca,ar9344";
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};
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&cpuintc {
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qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
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qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
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<&ddr_ctrl 1>;
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};
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&rst {
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intc2: interrupt-controller {
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compatible = "qca,ar9340-intc";
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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qca,int-status-addr = <0xac>;
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qca,pending-bits = <0xf>, /* wmac */
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<0x1f0>; /* pcie rc1 */
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qca,ddr-wb-channel-interrupts = <0>, <1>;
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qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
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};
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};
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&ahb {
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pcie: pcie@180c0000 {
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compatible = "qcom,ar9340-pci", "qcom,ar7240-pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x0 0x0>;
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reg = <0x180c0000 0x1000>, /* CRP */
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<0x180f0000 0x100>, /* CTRL */
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<0x14000000 0x1000>; /* CFG */
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reg-names = "crp_base", "ctrl_base", "cfg_base";
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ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
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0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
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interrupt-parent = <&intc2>;
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interrupts = <1>;
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device_type = "pci";
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resets = <&rst 6>, <&rst 7>;
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reset-names = "hc", "phy";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 1>;
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interrupt-map = <0 0 0 0 &pcie 0>;
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status = "disabled";
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};
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};
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&wmac {
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interrupt-parent = <&intc2>;
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interrupts = <0>;
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};
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