c06fb25d1f
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58 lines
1.9 KiB
Diff
58 lines
1.9 KiB
Diff
From e5104bc345222b6032af61c79f140f663e07207e Mon Sep 17 00:00:00 2001
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From: Lee Jackson <lee.jackson@arducam.com>
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Date: Wed, 10 Jan 2024 09:06:16 +0800
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Subject: [PATCH 0823/1085] drivers: media: arducam_64mp: Add
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V4L2_CID_LINK_FREQ control
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Add V4L2_CID_LINK_FREQ as a read-only control with a value of 456 Mhz.
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This will be used by the CFE driver to corretly setup the DPHY timing
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parameters in the CSI-2 block.
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Signed-off-by: Lee Jackson <lee.jackson@arducam.com>
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---
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drivers/media/i2c/arducam_64mp.c | 16 ++++++++++++++++
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1 file changed, 16 insertions(+)
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--- a/drivers/media/i2c/arducam_64mp.c
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+++ b/drivers/media/i2c/arducam_64mp.c
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@@ -143,6 +143,10 @@ struct arducam_64mp_mode {
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struct arducam_64mp_reg_list reg_list;
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};
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+static const s64 arducam_64mp_link_freq_menu[] = {
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+ ARDUCAM_64MP_DEFAULT_LINK_FREQ,
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+};
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+
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static const struct arducam_64mp_reg mode_common_regs[] = {
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{0x0100, 0x00},
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{0x0136, 0x18},
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@@ -2272,9 +2276,11 @@ static int arducam_64mp_init_controls(st
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struct v4l2_ctrl_handler *ctrl_hdlr;
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struct i2c_client *client = v4l2_get_subdevdata(&arducam_64mp->sd);
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struct v4l2_fwnode_device_properties props;
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+ struct v4l2_ctrl *link_freq;
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unsigned int i;
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int ret;
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u8 test_pattern_max;
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+ u8 link_freq_max;
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ctrl_hdlr = &arducam_64mp->ctrl_handler;
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ret = v4l2_ctrl_handler_init(ctrl_hdlr, 16);
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@@ -2292,6 +2298,16 @@ static int arducam_64mp_init_controls(st
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ARDUCAM_64MP_PIXEL_RATE, 1,
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ARDUCAM_64MP_PIXEL_RATE);
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+ /* LINK_FREQ is also read only */
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+ link_freq_max = ARRAY_SIZE(arducam_64mp_link_freq_menu) - 1;
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+ link_freq =
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+ v4l2_ctrl_new_int_menu(ctrl_hdlr, &arducam_64mp_ctrl_ops,
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+ V4L2_CID_LINK_FREQ,
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+ link_freq_max, 0,
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+ arducam_64mp_link_freq_menu);
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+ if (link_freq)
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+ link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
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+
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/*
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* Create the controls here, but mode specific limits are setup
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* in the arducam_64mp_set_framing_limits() call below.
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