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| From 0bb4937b58ab712f158588376dbac97f8e9df68e Mon Sep 17 00:00:00 2001
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| From: Balsam CHIHI <bchihi@baylibre.com>
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| Date: Tue, 17 Oct 2023 21:05:41 +0200
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| Subject: [PATCH] dt-bindings: thermal: mediatek: Add LVTS thermal controller
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|  definition for mt8192
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| MIME-Version: 1.0
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| Content-Type: text/plain; charset=UTF-8
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| Content-Transfer-Encoding: 8bit
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| 
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| Add LVTS thermal controller definition for MT8192.
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| 
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| Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
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| Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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| Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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| Signed-off-by: Bernhard Rosenkränzer <bero@baylibre.com>
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| Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
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| Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
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| Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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| Link: https://lore.kernel.org/r/20231017190545.157282-2-bero@baylibre.com
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| ---
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|  .../thermal/mediatek,lvts-thermal.h           | 19 +++++++++++++++++++
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|  1 file changed, 19 insertions(+)
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| 
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| --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
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| +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
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| @@ -35,4 +35,23 @@
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|  #define MT8195_AP_CAM0  15
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|  #define MT8195_AP_CAM1  16
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|  
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| +#define MT8192_MCU_BIG_CPU0     0
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| +#define MT8192_MCU_BIG_CPU1     1
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| +#define MT8192_MCU_BIG_CPU2     2
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| +#define MT8192_MCU_BIG_CPU3     3
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| +#define MT8192_MCU_LITTLE_CPU0  4
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| +#define MT8192_MCU_LITTLE_CPU1  5
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| +#define MT8192_MCU_LITTLE_CPU2  6
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| +#define MT8192_MCU_LITTLE_CPU3  7
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| +
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| +#define MT8192_AP_VPU0  8
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| +#define MT8192_AP_VPU1  9
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| +#define MT8192_AP_GPU0  10
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| +#define MT8192_AP_GPU1  11
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| +#define MT8192_AP_INFRA 12
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| +#define MT8192_AP_CAM   13
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| +#define MT8192_AP_MD0   14
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| +#define MT8192_AP_MD1   15
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| +#define MT8192_AP_MD2   16
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| +
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|  #endif /* __MEDIATEK_LVTS_DT_H */
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