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			649 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			649 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /dts-v1/;
 | |
| 
 | |
| / {
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| 	#address-cells = <1>;
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| 	#size-cells = <1>;
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| 	compatible = "ralink,mt7620a-soc";
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| 
 | |
| 	aliases {
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| 		spi0 = &spi0;
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| 		spi1 = &spi1;
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| 		serial0 = &uartlite;
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| 	};
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| 
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| 	cpus {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 
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| 		cpu@0 {
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| 			compatible = "mips,mips24KEc";
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| 			reg = <0>;
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| 		};
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| 	};
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| 
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| 	chosen {
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| 		bootargs = "console=ttyS0,57600";
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| 	};
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| 
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| 	cpuintc: cpuintc {
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| 		#address-cells = <0>;
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| 		#interrupt-cells = <1>;
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| 		interrupt-controller;
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| 		compatible = "mti,cpu-interrupt-controller";
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| 	};
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| 
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| 	mmc_reg_1v8: regulator-1v8 {
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| 		compatible = "regulator-fixed";
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| 
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| 		enable-active-high;
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| 
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| 		regulator-always-on;
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| 		regulator-max-microvolt = <1800000>;
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| 		regulator-min-microvolt = <1800000>;
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| 		regulator-name = "mmc_io";
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| 	};
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| 
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| 	mmc_reg_3v3: regulator-3v3 {
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| 		compatible = "regulator-fixed";
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| 
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| 		enable-active-high;
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| 
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| 		regulator-always-on;
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| 		regulator-max-microvolt = <3300000>;
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| 		regulator-min-microvolt = <3300000>;
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| 		regulator-name = "mmc_power";
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| 	};
 | |
| 
 | |
| 	palmbus: palmbus@10000000 {
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| 		compatible = "palmbus";
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| 		reg = <0x10000000 0x200000>;
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| 		ranges = <0x0 0x10000000 0x1FFFFF>;
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| 
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 
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| 		sysc: syscon@0 {
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| 			compatible = "ralink,mt7620-sysc", "syscon";
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| 			reg = <0x0 0x100>;
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| 			#clock-cells = <1>;
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| 			#reset-cells = <1>;
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| 		};
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| 
 | |
| 		timer: timer@100 {
 | |
| 			compatible = "ralink,rt2880-timer";
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| 			reg = <0x100 0x20>;
 | |
| 
 | |
| 			clocks = <&sysc 7>;
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <1>;
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| 		};
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| 
 | |
| 		watchdog: watchdog@120 {
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| 			compatible = "ralink,rt2880-wdt";
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| 			reg = <0x120 0x10>;
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| 
 | |
| 			clocks = <&sysc 8>;
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| 
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| 			resets = <&sysc 8>;
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| 			reset-names = "wdt";
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| 
 | |
| 			interrupt-parent = <&intc>;
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| 			interrupts = <1>;
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| 		};
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| 
 | |
| 		intc: intc@200 {
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| 			compatible = "ralink,rt2880-intc";
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| 			reg = <0x200 0x100>;
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| 
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| 			interrupt-controller;
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| 			#interrupt-cells = <1>;
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| 
 | |
| 			interrupt-parent = <&cpuintc>;
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| 			interrupts = <2>;
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| 		};
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| 
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| 		memc: memc@300 {
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| 			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
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| 			reg = <0x300 0x100>;
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <3>;
 | |
| 		};
 | |
| 
 | |
| 		uart: uart@500 {
 | |
| 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
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| 			reg = <0x500 0x100>;
 | |
| 
 | |
| 			clocks = <&sysc 9>;
 | |
| 
 | |
| 			resets = <&sysc 12>;
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <5>;
 | |
| 
 | |
| 			reg-shift = <2>;
 | |
| 
 | |
| 			status = "disabled";
 | |
| 		};
 | |
| 
 | |
| 		gpio0: gpio@600 {
 | |
| 			compatible = "ralink,rt2880-gpio";
 | |
| 			reg = <0x600 0x34>;
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <6>;
 | |
| 			interrupt-controller;
 | |
| 			#interrupt-cells = <2>;
 | |
| 
 | |
| 			gpio-controller;
 | |
| 			#gpio-cells = <2>;
 | |
| 
 | |
| 			ngpios = <24>;
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| 			ralink,register-map = [ 00 04 08 0c
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| 						20 24 28 2c
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| 						30 34 ];
 | |
| 		};
 | |
| 
 | |
| 		gpio1: gpio@638 {
 | |
| 			compatible = "ralink,rt2880-gpio";
 | |
| 			reg = <0x638 0x24>;
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <6>;
 | |
| 			interrupt-controller;
 | |
| 			#interrupt-cells = <2>;
 | |
| 
 | |
| 			gpio-controller;
 | |
| 			#gpio-cells = <2>;
 | |
| 
 | |
| 			ngpios = <16>;
 | |
| 			ralink,register-map = [ 00 04 08 0c
 | |
| 						10 14 18 1c
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| 						20 24 ];
 | |
| 
 | |
| 			status = "disabled";
 | |
| 		};
 | |
| 
 | |
| 		gpio2: gpio@660 {
 | |
| 			compatible = "ralink,rt2880-gpio";
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| 			reg = <0x660 0x24>;
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| 
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| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <6>;
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| 			interrupt-controller;
 | |
| 			#interrupt-cells = <2>;
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| 
 | |
| 			gpio-controller;
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| 			#gpio-cells = <2>;
 | |
| 
 | |
| 			ngpios = <32>;
 | |
| 			ralink,register-map = [ 00 04 08 0c
 | |
| 						10 14 18 1c
 | |
| 						20 24 ];
 | |
| 
 | |
| 			status = "disabled";
 | |
| 		};
 | |
| 
 | |
| 		gpio3: gpio@688 {
 | |
| 			compatible = "ralink,rt2880-gpio";
 | |
| 			reg = <0x688 0x24>;
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <6>;
 | |
| 			interrupt-controller;
 | |
| 			#interrupt-cells = <2>;
 | |
| 
 | |
| 			gpio-controller;
 | |
| 			#gpio-cells = <2>;
 | |
| 
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| 			ngpios = <1>;
 | |
| 			ralink,register-map = [ 00 04 08 0c
 | |
| 						10 14 18 1c
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| 						20 24 ];
 | |
| 
 | |
| 			status = "disabled";
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| 		};
 | |
| 
 | |
| 		i2c: i2c@900 {
 | |
| 			compatible = "ralink,rt2880-i2c";
 | |
| 			reg = <0x900 0x100>;
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| 
 | |
| 			clocks = <&sysc 10>;
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| 
 | |
| 			resets = <&sysc 16>;
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| 			reset-names = "i2c";
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| 
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 
 | |
| 			status = "disabled";
 | |
| 
 | |
| 			pinctrl-names = "default";
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| 			pinctrl-0 = <&i2c_pins>;
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| 		};
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| 
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| 		i2s: i2s@a00 {
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| 			compatible = "mediatek,mt7620-i2s";
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| 			reg = <0xa00 0x100>;
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| 
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| 			clocks = <&sysc 11>;
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| 
 | |
| 			resets = <&sysc 17>;
 | |
| 			reset-names = "i2s";
 | |
| 
 | |
| 			interrupt-parent = <&intc>;
 | |
| 			interrupts = <10>;
 | |
| 
 | |
| 			txdma-req = <2>;
 | |
| 			rxdma-req = <3>;
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| 
 | |
| 			dmas = <&gdma 4>,
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| 				<&gdma 6>;
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| 			dma-names = "tx", "rx";
 | |
| 
 | |
| 			status = "disabled";
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| 		};
 | |
| 
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| 		spi0: spi@b00 {
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| 			compatible = "ralink,rt2880-spi";
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| 			reg = <0xb00 0x40>;
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| 
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| 			clocks = <&sysc 12>;
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| 
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| 			resets = <&sysc 18>;
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| 			reset-names = "spi";
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| 
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 
 | |
| 			status = "disabled";
 | |
| 
 | |
| 			pinctrl-names = "default";
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| 			pinctrl-0 = <&spi_pins>;
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| 		};
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| 
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| 		spi1: spi@b40 {
 | |
| 			compatible = "ralink,rt2880-spi";
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| 			reg = <0xb40 0x60>;
 | |
| 
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| 			clocks = <&sysc 13>;
 | |
| 
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| 			resets = <&sysc 18>;
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| 			reset-names = "spi";
 | |
| 
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| 			#address-cells = <1>;
 | |
| 			#size-cells = <0>;
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| 
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| 			status = "disabled";
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| 
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| 			pinctrl-names = "default";
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| 			pinctrl-0 = <&spi_cs1>;
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| 		};
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| 
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| 		uartlite: uartlite@c00 {
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| 			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
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| 			reg = <0xc00 0x100>;
 | |
| 
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| 			clocks = <&sysc 14>;
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| 
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| 			resets = <&sysc 19>;
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| 
 | |
| 			interrupt-parent = <&intc>;
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| 			interrupts = <12>;
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| 
 | |
| 			reg-shift = <2>;
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| 
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| 			pinctrl-names = "default";
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| 			pinctrl-0 = <&uartlite_pins>;
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| 		};
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| 
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| 		systick: systick@d00 {
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| 			compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
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| 			reg = <0xd00 0x10>;
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| 
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| 			interrupt-parent = <&cpuintc>;
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| 			interrupts = <7>;
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| 		};
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| 
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| 		pcm: pcm@2000 {
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| 			compatible = "ralink,mt7620a-pcm";
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| 			reg = <0x2000 0x800>;
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| 
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| 			resets = <&sysc 11>;
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| 			reset-names = "pcm";
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| 
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| 			interrupt-parent = <&intc>;
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| 			interrupts = <4>;
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| 
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| 			status = "disabled";
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| 		};
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| 
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| 		gdma: gdma@2800 {
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| 			compatible = "ralink,rt3883-gdma";
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| 			reg = <0x2800 0x800>;
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| 
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| 			resets = <&sysc 14>;
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| 			reset-names = "dma";
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| 
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| 			interrupt-parent = <&intc>;
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| 			interrupts = <7>;
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| 
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| 			#dma-cells = <1>;
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| 			#dma-channels = <16>;
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| 			#dma-requests = <16>;
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| 
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| 			status = "disabled";
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| 		};
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| 	};
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| 
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| 	pinctrl: pinctrl {
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| 		compatible = "ralink,rt2880-pinmux";
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| 		pinctrl-names = "default";
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| 		pinctrl-0 = <&state_default>;
 | |
| 
 | |
| 		state_default: pinctrl0 {
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| 		};
 | |
| 
 | |
| 		pcm_i2s_pins: pcm_i2s {
 | |
| 			pcm_i2s {
 | |
| 				groups = "uartf";
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| 				function = "pcm i2s";
 | |
| 			};
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| 		};
 | |
| 
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| 		uartf_gpio_pins: uartf_gpio {
 | |
| 			uartf_gpio {
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| 				groups = "uartf";
 | |
| 				function = "gpio uartf";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		gpio_i2s_pins: gpio_i2s {
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| 			gpio_i2s {
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| 				groups = "uartf";
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| 				function = "gpio i2s";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		spi_pins: spi_pins {
 | |
| 			spi_pins {
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| 				groups = "spi";
 | |
| 				function = "spi";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		spi_cs1: spi1 {
 | |
| 			spi1 {
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| 				groups = "spi refclk";
 | |
| 				function = "spi refclk";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		i2c_pins: i2c_pins {
 | |
| 			i2c_pins {
 | |
| 				groups = "i2c";
 | |
| 				function = "i2c";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		uartlite_pins: uartlite {
 | |
| 			uart {
 | |
| 				groups = "uartlite";
 | |
| 				function = "uartlite";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		mdio_pins: mdio {
 | |
| 			mdio {
 | |
| 				groups = "mdio";
 | |
| 				function = "mdio";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		mdio_refclk_pins: mdio_refclk {
 | |
| 			mdio_refclk {
 | |
| 				groups = "mdio";
 | |
| 				function = "refclk";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		ephy_pins: ephy {
 | |
| 			ephy {
 | |
| 				groups = "ephy";
 | |
| 				function = "ephy";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		wled_pins: wled {
 | |
| 			wled {
 | |
| 				groups = "wled";
 | |
| 				function = "wled";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		rgmii1_pins: rgmii1 {
 | |
| 			rgmii1 {
 | |
| 				groups = "rgmii1";
 | |
| 				function = "rgmii1";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		rgmii2_pins: rgmii2 {
 | |
| 			rgmii2 {
 | |
| 				groups = "rgmii2";
 | |
| 				function = "rgmii2";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		pcie_pins: pcie {
 | |
| 			pcie {
 | |
| 				groups = "pcie";
 | |
| 				function = "pcie rst";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		pa_pins: pa {
 | |
| 			pa {
 | |
| 				groups = "pa";
 | |
| 				function = "pa";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		pa_gpio_pins: pa_gpio {
 | |
| 			pa {
 | |
| 				groups = "pa";
 | |
| 				function = "gpio";
 | |
| 			};
 | |
| 		};
 | |
| 
 | |
| 		sdhci_pins: sdhci {
 | |
| 			sdhci {
 | |
| 				groups = "nd_sd";
 | |
| 				function = "sd";
 | |
| 			};
 | |
| 		};
 | |
| 	};
 | |
| 
 | |
| 	usbphy: usbphy {
 | |
| 		compatible = "mediatek,mt7620-usbphy";
 | |
| 		#phy-cells = <0>;
 | |
| 
 | |
| 		ralink,sysctl = <&sysc>;
 | |
| 		/* usb phy reset is only controled by RSTCTRL bit 25 */
 | |
| 		resets = <&sysc 25>, <&sysc 22>;
 | |
| 		reset-names = "host", "device";
 | |
| 	};
 | |
| 
 | |
| 	ethernet: ethernet@10100000 {
 | |
| 		compatible = "mediatek,mt7620-eth";
 | |
| 		reg = <0x10100000 0x10000>;
 | |
| 
 | |
| 		#address-cells = <1>;
 | |
| 		#size-cells = <0>;
 | |
| 
 | |
| 		interrupt-parent = <&cpuintc>;
 | |
| 		interrupts = <5>;
 | |
| 
 | |
| 		resets = <&sysc 21>, <&sysc 23>;
 | |
| 		reset-names = "fe", "esw";
 | |
| 
 | |
| 		mediatek,switch = <&gsw>;
 | |
| 
 | |
| 		port@4 {
 | |
| 			compatible = "mediatek,eth-port";
 | |
| 			reg = <4>;
 | |
| 
 | |
| 			status = "disabled";
 | |
| 		};
 | |
| 
 | |
| 		port@5 {
 | |
| 			compatible = "mediatek,eth-port";
 | |
| 			reg = <5>;
 | |
| 
 | |
| 			status = "disabled";
 | |
| 		};
 | |
| 
 | |
| 		mdio-bus {
 | |
| 			#address-cells = <1>;
 | |
| 			#size-cells = <0>;
 | |
| 
 | |
| 			status = "disabled";
 | |
| 		};
 | |
| 	};
 | |
| 
 | |
| 	gsw: gsw@10110000 {
 | |
| 		compatible = "mediatek,mt7620-gsw";
 | |
| 		reg = <0x10110000 0x8000>;
 | |
| 
 | |
| 		resets = <&sysc 24>;
 | |
| 		reset-names = "ephy";
 | |
| 
 | |
| 		interrupt-parent = <&intc>;
 | |
| 		interrupts = <17>;
 | |
| 	};
 | |
| 
 | |
| 	sdhci: mmc@10130000 {
 | |
| 		compatible = "mediatek,mt7620-mmc", "ralink,mt7620-sdhci";
 | |
| 		reg = <0x10130000 0x4000>;
 | |
| 
 | |
| 		bus-width = <4>;
 | |
| 
 | |
| 		cap-mmc-highspeed;
 | |
| 		cap-sd-highspeed;
 | |
| 
 | |
| 		clocks = <&sysc 15>, <&sysc 15>;
 | |
| 		clock-names = "source", "hclk";
 | |
| 
 | |
| 		disable-wp;
 | |
| 
 | |
| 		interrupt-parent = <&intc>;
 | |
| 		interrupts = <14>;
 | |
| 
 | |
| 		max-frequency = <48000000>;
 | |
| 
 | |
| 		pinctrl-names = "default", "state_uhs";
 | |
| 		pinctrl-0 = <&sdhci_pins>;
 | |
| 		pinctrl-1 = <&sdhci_pins>;
 | |
| 
 | |
| 		resets = <&sysc 30>;
 | |
| 		reset-names = "hrst";
 | |
| 
 | |
| 		vmmc-supply = <&mmc_reg_3v3>;
 | |
| 		vqmmc-supply = <&mmc_reg_1v8>;
 | |
| 
 | |
| 		status = "disabled";
 | |
| 	};
 | |
| 
 | |
| 	ehci: ehci@101c0000 {
 | |
| 		#address-cells = <1>;
 | |
| 		#size-cells = <0>;
 | |
| 		compatible = "generic-ehci";
 | |
| 		reg = <0x101c0000 0x1000>;
 | |
| 
 | |
| 		interrupt-parent = <&intc>;
 | |
| 		interrupts = <18>;
 | |
| 
 | |
| 		phys = <&usbphy>;
 | |
| 		phy-names = "usb";
 | |
| 
 | |
| 		status = "disabled";
 | |
| 
 | |
| 		ehci_port1: port@1 {
 | |
| 			reg = <1>;
 | |
| 			#trigger-source-cells = <0>;
 | |
| 		};
 | |
| 	};
 | |
| 
 | |
| 	ohci: ohci@101c1000 {
 | |
| 		#address-cells = <1>;
 | |
| 		#size-cells = <0>;
 | |
| 		compatible = "generic-ohci";
 | |
| 		reg = <0x101c1000 0x1000>;
 | |
| 
 | |
| 		interrupt-parent = <&intc>;
 | |
| 		interrupts = <18>;
 | |
| 
 | |
| 		phys = <&usbphy>;
 | |
| 		phy-names = "usb";
 | |
| 
 | |
| 		status = "disabled";
 | |
| 
 | |
| 		ohci_port1: port@1 {
 | |
| 			reg = <1>;
 | |
| 			#trigger-source-cells = <0>;
 | |
| 		};
 | |
| 	};
 | |
| 
 | |
| 	pcie: pcie@10140000 {
 | |
| 		compatible = "mediatek,mt7620-pci";
 | |
| 		reg = <0x10140000 0x100
 | |
| 			0x10142000 0x100>;
 | |
| 
 | |
| 		#address-cells = <3>;
 | |
| 		#size-cells = <2>;
 | |
| 
 | |
| 		resets = <&sysc 26>;
 | |
| 		reset-names = "pcie0";
 | |
| 
 | |
| 		interrupt-parent = <&cpuintc>;
 | |
| 		interrupts = <4>;
 | |
| 
 | |
| 		pinctrl-names = "default";
 | |
| 		pinctrl-0 = <&pcie_pins>;
 | |
| 
 | |
| 		device_type = "pci";
 | |
| 
 | |
| 		bus-range = <0 255>;
 | |
| 		ranges = <
 | |
| 			0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 | |
| 			0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 | |
| 		>;
 | |
| 
 | |
| 		status = "disabled";
 | |
| 
 | |
| 		pcie0: pcie@0,0 {
 | |
| 			reg = <0x0000 0 0 0 0>;
 | |
| 
 | |
| 			#address-cells = <3>;
 | |
| 			#size-cells = <2>;
 | |
| 
 | |
| 			device_type = "pci";
 | |
| 
 | |
| 			ranges;
 | |
| 		};
 | |
| 	};
 | |
| 
 | |
| 	wmac: wmac@10180000 {
 | |
| 		compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
 | |
| 		reg = <0x10180000 0x40000>;
 | |
| 
 | |
| 		clocks = <&sysc 16>;
 | |
| 
 | |
| 		interrupt-parent = <&cpuintc>;
 | |
| 		interrupts = <6>;
 | |
| 
 | |
| 		ralink,eeprom = "soc_wmac.eeprom";
 | |
| 	};
 | |
| };
 |