c06fb25d1f
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36 lines
1.1 KiB
Diff
36 lines
1.1 KiB
Diff
From 3eaf2abd11aa7f3b2fb04d60c64b2c756fe030eb Mon Sep 17 00:00:00 2001
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From: Muhammed Efe Cetin <efectn@6tel.net>
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Date: Mon, 9 Oct 2023 22:27:26 +0300
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Subject: [PATCH] arm64: dts: rockchip: Add sfc node to rk3588s
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Add SFC (SPI Flash) to RK3588S SOC.
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Reviewed-by: Dhruva Gole <d-gole@ti.com>
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Signed-off-by: Muhammed Efe Cetin <efectn@6tel.net>
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Link: https://lore.kernel.org/r/d36a64edfaede92ce2e158b0d9dc4f5998e019e3.1696878787.git.efectn@6tel.net
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++
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1 file changed, 11 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
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@@ -1425,6 +1425,17 @@
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};
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};
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+ sfc: spi@fe2b0000 {
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+ compatible = "rockchip,sfc";
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+ reg = <0x0 0xfe2b0000 0x0 0x4000>;
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+ interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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+ clock-names = "clk_sfc", "hclk_sfc";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "disabled";
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+ };
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+
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sdmmc: mmc@fe2c0000 {
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compatible = "rockchip,rk3588-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xfe2c0000 0x0 0x4000>;
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