c06fb25d1f
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50 lines
1.4 KiB
Diff
50 lines
1.4 KiB
Diff
From 756e7d3251ad8f6c72e7bf4c476537a89f673e38 Mon Sep 17 00:00:00 2001
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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Sun, 21 Jul 2024 01:48:38 +0100
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Subject: [PATCH 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x
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Enable the just added Rockchip RNG driver for RK356x SoCs.
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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arch/arm64/boot/dts/rockchip/rk3568.dtsi | 7 +++++++
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arch/arm64/boot/dts/rockchip/rk356x.dtsi | 10 ++++++++++
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2 files changed, 17 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@@ -257,6 +257,13 @@
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};
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};
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+&rng {
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+ rockchip,sample-count = <1000>;
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+ quality = <900>;
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+
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+ status = "okay";
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+};
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+
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&usb_host0_xhci {
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phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>;
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phy-names = "usb2-phy", "usb3-phy";
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--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -1106,6 +1106,16 @@
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status = "disabled";
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};
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+ rng: rng@fe388000 {
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+ compatible = "rockchip,rk3568-rng";
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+ reg = <0x0 0xfe388000 0x0 0x4000>;
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+ clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
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+ clock-names = "core", "ahb";
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+ resets = <&cru SRST_TRNG_NS>;
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+ reset-names = "reset";
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+ status = "disabled";
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+ };
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+
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i2s0_8ch: i2s@fe400000 {
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compatible = "rockchip,rk3568-i2s-tdm";
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reg = <0x0 0xfe400000 0x0 0x1000>;
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