kernel: 5.15: add support for ESMT F50x1G41LB
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
This commit is contained in:
Chuanhong Guo
@@ -0,0 +1,143 @@
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From a43b844cb40bf1b783055fdc81b7f991e21e7e76 Mon Sep 17 00:00:00 2001
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From: Chuanhong Guo <gch981213@gmail.com>
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Date: Wed, 13 Apr 2022 11:58:17 +0800
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Subject: [PATCH] mtd: spinand: add support for ESMT F50x1G41LB
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This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
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It seems that ESMT likes to use random JEDEC ID from other vendors.
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Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
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Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
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JEDEC ID in variable name.
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Datasheets:
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https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
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https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf
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Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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---
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drivers/mtd/nand/spi/Makefile | 2 +-
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drivers/mtd/nand/spi/core.c | 1 +
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drivers/mtd/nand/spi/esmt.c | 89 +++++++++++++++++++++++++++++++++++
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include/linux/mtd/spinand.h | 1 +
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4 files changed, 92 insertions(+), 1 deletion(-)
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create mode 100644 drivers/mtd/nand/spi/esmt.c
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--- a/drivers/mtd/nand/spi/Makefile
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+++ b/drivers/mtd/nand/spi/Makefile
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@@ -1,3 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
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+spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
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obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
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--- a/drivers/mtd/nand/spi/core.c
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+++ b/drivers/mtd/nand/spi/core.c
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@@ -896,6 +896,7 @@ static const struct nand_ops spinand_ops
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};
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static const struct spinand_manufacturer *spinand_manufacturers[] = {
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+ &esmt_c8_spinand_manufacturer,
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&gigadevice_spinand_manufacturer,
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¯onix_spinand_manufacturer,
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µn_spinand_manufacturer,
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--- /dev/null
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+++ b/drivers/mtd/nand/spi/esmt.c
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@@ -0,0 +1,89 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * Author:
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+ * Chuanhong Guo <gch981213@gmail.com>
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+ */
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+
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+#include <linux/device.h>
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+#include <linux/kernel.h>
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+#include <linux/mtd/spinand.h>
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+
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+/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
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+#define SPINAND_MFR_ESMT_C8 0xc8
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+
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+static SPINAND_OP_VARIANTS(read_cache_variants,
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+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(write_cache_variants,
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+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(update_cache_variants,
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+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+
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+static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section > 3)
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+ return -ERANGE;
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+
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+ region->offset = 16 * section + 8;
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+ region->length = 8;
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+
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+ return 0;
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+}
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+
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+static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *region)
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+{
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+ if (section > 3)
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+ return -ERANGE;
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+
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+ region->offset = 16 * section + 2;
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+ region->length = 6;
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+
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+ return 0;
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+}
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+
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+static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
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+ .ecc = f50l1g41lb_ooblayout_ecc,
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+ .free = f50l1g41lb_ooblayout_free,
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+};
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+
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+static const struct spinand_info esmt_c8_spinand_table[] = {
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+ SPINAND_INFO("F50L1G41LB",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
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+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(1, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ 0,
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+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
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+ SPINAND_INFO("F50D1G41LB",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
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+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(1, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ 0,
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+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
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+};
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+
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+static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
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+};
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+
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+const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
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+ .id = SPINAND_MFR_ESMT_C8,
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+ .name = "ESMT",
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+ .chips = esmt_c8_spinand_table,
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+ .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
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+ .ops = &esmt_spinand_manuf_ops,
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+};
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--- a/include/linux/mtd/spinand.h
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+++ b/include/linux/mtd/spinand.h
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@@ -260,6 +260,7 @@ struct spinand_manufacturer {
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};
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/* SPI NAND manufacturers */
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+extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
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extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
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extern const struct spinand_manufacturer macronix_spinand_manufacturer;
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extern const struct spinand_manufacturer micron_spinand_manufacturer;
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