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add preliminary support for 2.6.24

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SVN-Revision: 10329
This commit is contained in:
Gabor Juhos
2008-01-30 15:25:48 +00:00
parent 9bfca5ce18
commit 128bb0967a
30 changed files with 1928 additions and 7 deletions
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1
target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_info.h
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@@ -50,7 +50,6 @@ extern unsigned char adm5120_eth_vlans[6];
extern void adm5120_soc_init(void) __init;
extern void adm5120_mem_init(void) __init;
extern void adm5120_time_init(void) __init;
extern void adm5120_ndelay(u32 ns);
extern void adm5120_restart(char *command);

6
target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h
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@@ -18,8 +18,10 @@
#ifndef _ADM5120_SWITCH_H_
#define _ADM5120_SWITCH_H_
#define BIT(at) (1 << (at))
#define BITMASK(len) ((1 << (len))-1)
#ifndef BIT
# define BIT(at) (1 << (at))
#endif
#define BITMASK(len) (BIT(len)-1)
#define SW_READ_REG(r) __raw_readl( \
(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r)

25
target/linux/adm5120/files/include/asm-mips/mach-adm5120/war.h Normal file
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@@ -0,0 +1,25 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
*/
#ifndef __ASM_MIPS_MACH_ADM5120_WAR_H
#define __ASM_MIPS_MACH_ADM5120_WAR_H
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
#define R4600_V2_HIT_CACHEOP_WAR 0
#define R5432_CP0_INTERRUPT_WAR 0
#define BCM1250_M3_WAR 0
#define SIBYTE_1956_WAR 0
#define MIPS4K_ICACHE_REFILL_WAR 0
#define MIPS_CACHE_SYNC_WAR 0
#define TX49XX_ICACHE_INDEX_INV_WAR 0
#define RM9000_CDEX_SMP_WAR 0
#define ICACHE_REFILLS_WORKAROUND_WAR 0
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
#endif /* __ASM_MIPS_MACH_ADM5120_WAR_H */