kernel: bump 4.9 to 4.9.124

Refreshed all patches.

Compile-tested on: ar71xx
Runtime-tested on: ar71xx

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
This commit is contained in:
Koen Vandeputte
2018-08-28 16:09:37 +02:00
parent 23366b6dc6
commit 22f899c6dd
12 changed files with 19 additions and 19 deletions

View File

@@ -770,7 +770,7 @@
};
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -380,8 +380,8 @@ static int socfpga_dwmac_resume(struct d
@@ -390,8 +390,8 @@ static int socfpga_dwmac_resume(struct d
* control register 0, and can be modified by the phy driver
* framework.
*/

View File

@@ -597,7 +597,7 @@
{ .compatible = "rockchip,rk3399-gmac", .data = &rk3399_ops },
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -341,7 +341,7 @@ static int socfpga_dwmac_probe(struct pl
@@ -351,7 +351,7 @@ static int socfpga_dwmac_probe(struct pl
* mode. Create a copy of the core reset handle so it can be used by
* the driver later.
*/

View File

@@ -47,7 +47,7 @@
struct mii_regs {
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -269,7 +269,10 @@ static int socfpga_dwmac_set_phy_mode(st
@@ -270,7 +270,10 @@ static int socfpga_dwmac_set_phy_mode(st
ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift);
ctrl |= val << reg_shift;