b53: update header register difinitions
BCM531x5 has two pontential cpu ports, and header mode can be enabled independently on both. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 48302
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		@@ -181,7 +181,8 @@
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/* Broadcom Header control register (8 bit) */
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					/* Broadcom Header control register (8 bit) */
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#define B53_BRCM_HDR			0x03
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					#define B53_BRCM_HDR			0x03
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#define   BRCM_HDR_EN			BIT(0) /* Enable tagging on IMP port */
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					#define   BRCM_HDR_P8_EN		BIT(0) /* Enable tagging on port 8 */
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					#define   BRCM_HDR_P5_EN		BIT(1) /* Enable tagging on port 5 */
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/* Device ID register (8 or 32 bit) */
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					/* Device ID register (8 or 32 bit) */
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#define B53_DEVICE_ID			0x30
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					#define B53_DEVICE_ID			0x30
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