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kernel: bump 5.10 to 5.10.89

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Deleted (upstreamed):
bcm27xx/patches-5.10/950-0186-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch [1]
sunxi/patches-5.10/103-arm64-dts-allwinner-orangepi-zero-plus-fix-PHY-mo.patch [2]

[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.89&id=ba696b470839d70c6b8290c1f798bac7fb2a584c
[2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.89&id=93a957bbf46ceb224b959de61fe85cfc6f71b6c7

Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This commit is contained in:
Rui Salvaterra
2021-12-29 13:13:29 +00:00
committed by Hauke Mehrtens
parent 7bf62e2451
commit 2bb02ccae3
13 changed files with 18 additions and 128 deletions
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32
target/linux/sunxi/patches-5.10/103-arm64-dts-allwinner-orangepi-zero-plus-fix-PHY-mo.patch
View File

@@ -1,32 +0,0 @@
From 4f45f9f370a5bc6a43a7a166f10b3a30ca21353c Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Wed, 17 Nov 2021 10:36:31 +0100
Subject: [PATCH v2] arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
currently set to plain RGMII mode meaning that it doesn't introduce
delays.
With this setup, TX packets are completely lost and changing the mode to
RGMII-ID so the PHY will add delays internally fixes the issue.
Fixes: a7affb13b271 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
Tested-by: Ron Goossens <rgoossens@gmail.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Tested-by: Samuel Holland <samuel@sholland.org>
---
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
@@ -69,7 +69,7 @@
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};