added ssc reg defines to ifxmips header file
SVN-Revision: 9842
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		@@ -348,11 +348,27 @@
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/*------------ SSC */
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					/*------------ SSC */
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#define IFXMIPS_SSC1_BASE_ADDR	(KSEG1 + 0x1e100800)
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					#define IFXMIPS_SSC_BASE_ADDR	(KSEG1 + 0x1e100800)
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					#define IFXMIPS_SSC_CLC          ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0000))
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					#define IFXMIPS_SSC_IRN          ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x00F4))
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					#define IFXMIPS_SSC_SFCON        ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0060))
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					#define IFXMIPS_SSC_WHBGPOSTAT   ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0078))
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					#define IFXMIPS_SSC_STATE        ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0014))
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					#define IFXMIPS_SSC_WHBSTATE     ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0018))
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					#define IFXMIPS_SSC_FSTAT        ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0038))
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					#define IFXMIPS_SSC_ID           ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0008))
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					#define IFXMIPS_SSC_TB           ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0020))
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					#define IFXMIPS_SSC_RXFCON       ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0030))
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					#define IFXMIPS_SSC_TXFCON       ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0034))
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					#define IFXMIPS_SSC_CON          ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0010))
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					#define IFXMIPS_SSC_GPOSTAT      ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0074))
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					#define IFXMIPS_SSC_RB           ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0024))
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					#define IFXMIPS_SSC_RXCNT        ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0084))
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					#define IFXMIPS_SSC_GPOCON       ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0070))
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					#define IFXMIPS_SSC_BR           ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0040))
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					#define IFXMIPS_SSC_RXREQ        ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0080))
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					#define IFXMIPS_SSC_SFSTAT       ((u32*)(IFXMIPS_SSC_BASE_ADDR + 0x0064))
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#endif
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					#endif
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