do not use MULTI_IRQ_HANDLER it is bogus on our platform
This caused stalls in the Ethernet DMA block, so until properly written and sorted out, fallback to the assembly version instead. SVN-Revision: 32470
This commit is contained in:
		@@ -4,3 +4,26 @@
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		.macro arch_ret_to_user, tmp1, tmp2
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							.macro arch_ret_to_user, tmp1, tmp2
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		.endm
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							.endm
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							.macro  get_irqnr_preamble, base, tmp
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							ldr	\base, =mcs814x_intc_base	@ base virtual address of AIC peripheral
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							ldr	\base, [\base]
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							.endm
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							.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
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							mov	\tmp, #0x40
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							ldr	\irqstat, [\base, \tmp]
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							tst	\irqstat, \irqstat       @ test if no active IRQ's
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							beq	1002f                    @ if no active irqs return with status 0
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							mov	\irqnr, #0               @ start from irq zero
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							mov	\tmp,   #1               @ the mask initially 1
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					1001:
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							tst     \irqstat, \tmp           @ and with mask
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							addeq   \irqnr, \irqnr, #1       @ if  zero then add one to nr
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							moveq   \tmp,   \tmp, lsl #1     @ shift mask one to left
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							beq     1001b                    @ if  zero then loop again
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							mov     \irqstat, \tmp           @ save the return mask
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							mov	\tmp, #0x00		 @ ICR offset
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							str     \irqstat,  [\base, \tmp] @ clear irq with selected mask
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					1002:
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					                .endm
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@@ -20,7 +20,7 @@
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#define MCS814X_IRQ_MASK	0x20
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					#define MCS814X_IRQ_MASK	0x20
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#define MCS814X_IRQ_STS0	0x40
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					#define MCS814X_IRQ_STS0	0x40
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static void __iomem *mcs814x_intc_base;
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					void __iomem *mcs814x_intc_base;
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static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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					static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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					unsigned int num)
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										unsigned int num)
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@@ -47,26 +47,6 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
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	__raw_writel(0xffffffff, base + MCS814X_IRQ_ICR);
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						__raw_writel(0xffffffff, base + MCS814X_IRQ_ICR);
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}
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					}
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asmlinkage void __exception_irq_entry mcs814x_handle_irq(struct pt_regs *regs)
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{
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	u32 status, irq;
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	do {
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		/* read the status register */
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		status = __raw_readl(mcs814x_intc_base + MCS814X_IRQ_STS0);
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		if (!status)
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			break;
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		irq = ffs(status) - 1;
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		status |= (1 << irq);
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		/* clear the interrupt */
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		__raw_writel(status, mcs814x_intc_base + MCS814X_IRQ_ICR);
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		/* call the generic handler */
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		handle_IRQ(irq, regs);
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	} while (1);
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}
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static const struct of_device_id mcs814x_intc_ids[] = {
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					static const struct of_device_id mcs814x_intc_ids[] = {
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	{ .compatible = "moschip,mcs814x-intc" },
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						{ .compatible = "moschip,mcs814x-intc" },
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	{ /* sentinel */ },
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						{ /* sentinel */ },
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@@ -1,6 +1,6 @@
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--- a/arch/arm/Kconfig
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					--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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					+++ b/arch/arm/Kconfig
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@@ -869,6 +869,21 @@ config ARCH_EXYNOS
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					@@ -869,6 +869,20 @@ config ARCH_EXYNOS
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 	help
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					 	help
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 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
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					 	  Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
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@@ -15,7 +15,6 @@
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+	select CLKDEV_LOOKUP
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					+	select CLKDEV_LOOKUP
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+	select ARCH_USES_GETTIMEOFFSET
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					+	select ARCH_USES_GETTIMEOFFSET
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+	select NEED_MACH_MEMORY_H
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					+	select NEED_MACH_MEMORY_H
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+	select MULTI_IRQ_HANDLER
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+	help
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					+	help
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+	  Support for Moschip MCS814x SoCs (MCS8140).
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					+	  Support for Moschip MCS814x SoCs (MCS8140).
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+
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					+
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