lantiq: dts: assign the GPHY LED pins to the Ethernet controller node

Assign the GPHY LED pins to the Ethernet controller node instead of
using pin hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

target/linux/lantiq/files/arch/mips/boot/dts/P2812HNUFX.dtsi

@@ -111,6 +111,11 @@
 };
 
 &eth0 {
+	pinctrl-0 = <&mdio_pins>,
+		    <&gphy0_led0_pins>, <&gphy0_led2_pins>,
+		    <&gphy1_led1_pins>, <&gphy1_led2_pins>;
+	pinctrl-names = "default";
+
 	lan: interface@0 {
 		compatible = "lantiq,xrx200-pdi";
 		#address-cells = <1>;
@@ -196,14 +201,6 @@
 			lantiq,groups = "exin3";
 			lantiq,function = "exin";
 		};
-		gphy-leds {
-			lantiq,groups = "gphy0 led1", "gphy1 led1",
-					"gphy0 led2", "gphy1 led2";
-			lantiq,function = "gphy";
-			lantiq,pull = <2>;
-			lantiq,open-drain = <0>;
-			lantiq,output = <1>;
-		};
 		stp {
 			lantiq,groups = "stp";
 			lantiq,function = "stp";

target/linux/lantiq/files/arch/mips/boot/dts/TDW89X0.dtsi

@@ -103,6 +103,9 @@
 };
 
 &eth0 {
+	pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
+	pinctrl-names = "default";
+
 	lan: interface@0 {
 		compatible = "lantiq,xrx200-pdi";
 		#address-cells = <1>;
@@ -175,13 +178,6 @@
 	pinctrl-0 = <&state_default>;
 
 	state_default: pinmux {
-		gphy-leds {
-			lantiq,groups = "gphy0 led1", "gphy1 led1";
-			lantiq,function = "gphy";
-			lantiq,pull = <2>;
-			lantiq,open-drain = <0>;
-			lantiq,output = <1>;
-		};
 		phy-rst {
 			lantiq,pins = "io42";
 			lantiq,pull = <0>;

target/linux/lantiq/files/arch/mips/boot/dts/VG3503J.dts

@@ -57,6 +57,10 @@
 };
 
 &eth0 {
+	pinctrl-0 = <&mdio_pins>,
+		    <&gphy0_led0_pins>, <&gphy0_led1_pins>, <&gphy0_led2_pins>,
+		    <&gphy1_led0_pins>, <&gphy1_led1_pins>, <&gphy1_led2_pins>;
+
 	interface@0 {
 		compatible = "lantiq,xrx200-pdi";
 		#address-cells = <1>;
@@ -110,23 +114,6 @@
 	lantiq,gphy-mode = <GPHY_MODE_GE>;
 };
 
-&gpio {
-	pinctrl-names = "default";
-	pinctrl-0 = <&state_default>;
-
-	state_default: pinmux {
-		gphy-leds {
-			lantiq,groups = "gphy0 led0", "gphy0 led1",
-					"gphy0 led2", "gphy1 led0",
-					"gphy1 led1", "gphy1 led2";
-			lantiq,function = "gphy";
-			lantiq,pull = <2>;
-			lantiq,open-drain = <0>;
-			lantiq,output = <1>;
-		};
-	};
-};
-
 &localbus {
 	flash@0 {
 		compatible = "lantiq,nor";

target/linux/lantiq/files/arch/mips/boot/dts/VGV7510KW22.dtsi

@@ -107,6 +107,11 @@
 };
 
 &eth0 {
+	pinctrl-0 = <&mdio_pins>,
+		    <&gphy0_led0_pins>, <&gphy0_led1_pins>,
+		    <&gphy1_led0_pins>, <&gphy1_led1_pins>;
+	pinctrl-names = "default";
+
 	lan: interface@0 {
 		compatible = "lantiq,xrx200-pdi";
 		#address-cells = <1>;
@@ -189,14 +194,6 @@
 	pinctrl-0 = <&state_default>;
 
 	state_default: pinmux {
-		gphy-leds {
-			lantiq,groups = "gphy0 led0", "gphy0 led1",
-					"gphy1 led0", "gphy1 led1";
-			lantiq,function = "gphy";
-			lantiq,open-drain = <0>;
-			lantiq,pull = <2>;
-			lantiq,output = <1>;
-		};
 		pci-rst {
 			lantiq,pins = "io21";
 			lantiq,open-drain = <0>;

target/linux/lantiq/files/arch/mips/boot/dts/VGV7519.dtsi

@@ -127,6 +127,9 @@
 };
 
 &eth0 {
+	pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led0_pins>;
+	pinctrl-names = "default";
+
 	lan: interface@0 {
 		compatible = "lantiq,xrx200-pdi";
 		#address-cells = <1>;
@@ -222,13 +225,6 @@
 			lantiq,pull = <0>;
 			lantiq,output = <1>;
 		};
-		gphy-leds {
-			lantiq,groups = "gphy0 led1", "gphy1 led0";
-			lantiq,function = "gphy";
-			lantiq,open-drain = <0>;
-			lantiq,pull = <0>;
-			lantiq,output = <1>;
-		};
 	};
 };
 

target/linux/lantiq/files/arch/mips/boot/dts/VR200.dtsi

@@ -23,6 +23,9 @@
 };
 
 &eth0 {
+	pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
+	pinctrl-names = "default";
+
 	lan: interface@0 {
 		compatible = "lantiq,xrx200-pdi";
 		#address-cells = <1>;
@@ -95,13 +98,6 @@
 	pinctrl-0 = <&state_default>;
 
 	state_default: pinmux {
-		gphy-leds {
-			lantiq,groups = "gphy0 led1", "gphy1 led1";
-			lantiq,function = "gphy";
-			lantiq,pull = <2>;
-			lantiq,open-drain = <0>;
-			lantiq,output = <1>;
-		};
 		phy-rst {
 			lantiq,pins = "io42";
 			lantiq,pull = <0>;

target/linux/lantiq/files/arch/mips/boot/dts/vr9.dtsi

@@ -213,6 +213,54 @@
 			gpio-controller;
 			reg = <0xe100b10 0xa0>;
 
+			gphy0_led0_pins: gphy0-led0 {
+				lantiq,groups = "gphy0 led0";
+				lantiq,function = "gphy";
+				lantiq,open-drain = <0>;
+				lantiq,pull = <2>;
+				lantiq,output = <1>;
+			};
+
+			gphy0_led1_pins: gphy0-led1 {
+				lantiq,groups = "gphy0 led1";
+				lantiq,function = "gphy";
+				lantiq,open-drain = <0>;
+				lantiq,pull = <2>;
+				lantiq,output = <1>;
+			};
+
+			gphy0_led2_pins: gphy0-led2 {
+				lantiq,groups = "gphy0 led2";
+				lantiq,function = "gphy";
+				lantiq,open-drain = <0>;
+				lantiq,pull = <2>;
+				lantiq,output = <1>;
+			};
+
+			gphy1_led0_pins: gphy1-led0 {
+				lantiq,groups = "gphy1 led0";
+				lantiq,function = "gphy";
+				lantiq,open-drain = <0>;
+				lantiq,pull = <2>;
+				lantiq,output = <1>;
+			};
+
+			gphy1_led1_pins: gphy1-led1 {
+				lantiq,groups = "gphy1 led1";
+				lantiq,function = "gphy";
+				lantiq,open-drain = <0>;
+				lantiq,pull = <2>;
+				lantiq,output = <1>;
+			};
+
+			gphy1_led2_pins: gphy1-led2 {
+				lantiq,groups = "gphy1 led2";
+				lantiq,function = "gphy";
+				lantiq,open-drain = <0>;
+				lantiq,pull = <2>;
+				lantiq,output = <1>;
+			};
+
 			mdio_pins: mdio {
 				mux {
 					lantiq,groups = "mdio";