layerscape: add ls2088ardb device support

The QorIQ LS2088A processor is built on the Layerscape
architecture combining eight ARM A72 processor cores
with advanced, high-performance datapath acceleration
and network, peripheral interfaces required for
networking, telecom, wireless infrastructure, aerospace
applications and general-purpose embedded applications.

Features summary:
- Eight 64-bit ARM v8 Cortex-A72 CPUs
- Two 64-bit DDR4 SDRAM memory controller with ECC
- One 32-bit DDR3 SDRAM memory controller with ECC
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces
- IFC, 4 PCIe, 2 SATA, 2 USB, 1 SDXC, 2 DUARTs etc

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

target/linux/layerscape/patches-4.4/8236-clk-add-API-of-clks.patch

@@ -0,0 +1,84 @@
+From df2373ca941741f3f66750241a048ad4e2ff2c91 Mon Sep 17 00:00:00 2001
+From: Zhao Qiang <qiang.zhao@nxp.com>
+Date: Thu, 24 Nov 2016 11:47:45 +0800
+Subject: [PATCH 236/238] clk: add API of clks
+
+Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
+---
+ drivers/clk/clk.c            |   19 +++++++++++++++++++
+ include/linux/clk-provider.h |    1 +
+ include/linux/clk.h          |    9 +++++++++
+ 3 files changed, 29 insertions(+)
+
+diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
+index f13c3f4..0f6bcf5 100644
+--- a/drivers/clk/clk.c
++++ b/drivers/clk/clk.c
+@@ -359,6 +359,19 @@ static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
+ 		return core->parents[index];
+ }
+ 
++struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
++{
++	struct clk_core *parent;
++
++	if (!clk)
++		return NULL;
++
++	parent = clk_core_get_parent_by_index(clk->core, index);
++
++	return !parent ? NULL : parent->hw->clk;
++}
++EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
++
+ struct clk_hw *
+ clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
+ {
+@@ -2033,6 +2046,12 @@ static const struct file_operations clk_summary_fops = {
+ 	.release	= single_release,
+ };
+ 
++unsigned int clk_get_num_parents(struct clk *clk)
++{
++	return !clk ? 0 : clk->core->num_parents;
++}
++EXPORT_SYMBOL_GPL(clk_get_num_parents);
++
+ static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
+ {
+ 	if (!c)
+diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
+index 7cd0171..77dfd61 100644
+--- a/include/linux/clk-provider.h
++++ b/include/linux/clk-provider.h
+@@ -650,6 +650,7 @@ unsigned int clk_hw_get_num_parents(const struct clk_hw *hw);
+ struct clk_hw *clk_hw_get_parent(const struct clk_hw *hw);
+ struct clk_hw *clk_hw_get_parent_by_index(const struct clk_hw *hw,
+ 					  unsigned int index);
++struct clk *clk_get_parent_by_index(struct clk *clk, u8 index);
+ unsigned int __clk_get_enable_count(struct clk *clk);
+ unsigned long clk_hw_get_rate(const struct clk_hw *hw);
+ unsigned long __clk_get_flags(struct clk *clk);
+diff --git a/include/linux/clk.h b/include/linux/clk.h
+index 0df4a51..1df90e3 100644
+--- a/include/linux/clk.h
++++ b/include/linux/clk.h
+@@ -392,6 +392,15 @@ int clk_set_parent(struct clk *clk, struct clk *parent);
+ struct clk *clk_get_parent(struct clk *clk);
+ 
+ /**
++ * clk_get_num_parents - get number of possible parents
++ * @clk: clock source
++ *
++ * Returns the number of possible parents of this clock,
++ * which can then be enumerated using clk_get_parent_by_index().
++ */
++unsigned int clk_get_num_parents(struct clk *clk);
++
++/**
+  * clk_get_sys - get a clock based upon the device name
+  * @dev_id: device name
+  * @con_id: connection ID
+-- 
+1.7.9.5
+