ipq806x: use qcom-ipq8064-v1.0.dtsi from upstream
This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches instead of keeping a local version. As a consequence: - we use a part of the shared definitions there and update device DTS files accordingly - we move additional stuff from our local v1.0.dtsi to the patch - we drop partitions, LEDs and keys from the file as we will implement them differently anyway Like with the previous patch, this follows the idea that a diff from upstream might be easier to handle than a big file of our own with different distribution pattern of properties. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit is contained in:
Adrian Schmutzler
@@ -28,48 +28,18 @@
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status = "okay";
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};
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&gsbi4 {
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qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "okay";
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serial@16340000 {
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status = "okay";
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};
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/*
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* The i2c device on gsbi4 should not be enabled.
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* On ipq806x designs gsbi4 i2c is meant for exclusive
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* RPM usage. Turning this on in kernel manifests as
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* i2c failure for the RPM.
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*/
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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spi4: spi@1a280000 {
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status = "okay";
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spi-max-frequency = <50000000>;
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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m25p80@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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&flash {
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partitions {
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compatible = "qcom,smem";
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};
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};
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};
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};
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&usb3_0 {
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status = "okay";
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@@ -156,11 +126,3 @@
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full-duplex;
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};
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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@@ -36,55 +36,18 @@
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};
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};
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&gsbi4 {
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qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "okay";
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serial@16340000 {
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status = "okay";
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};
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/*
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* The i2c device on gsbi4 should not be enabled.
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* On ipq806x designs gsbi4 i2c is meant for exclusive
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* RPM usage. Turning this on in kernel manifests as
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* i2c failure for the RPM.
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*/
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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spi4: spi@1a280000 {
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status = "okay";
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spi-max-frequency = <50000000>;
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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m25p80@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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&flash {
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partitions {
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compatible = "qcom,smem";
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};
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};
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};
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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@@ -38,25 +38,15 @@
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};
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};
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&gsbi5 {
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qcom,mode = <GSBI_PROT_SPI>;
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status = "okay";
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&gsbi4 {
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status = "disabled";
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};
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spi4: spi@1a280000 {
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status = "okay";
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spi-max-frequency = <50000000>;
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&gsbi4_serial {
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status = "disabled";
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};
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 0>;
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m25p80@0 {
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compatible = "s25fl256s1";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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&flash {
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m25p,fast-read;
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partition@0 {
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@@ -84,16 +74,6 @@
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reg = <0x2b0000 0x1d50000>;
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};
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};
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};
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};
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&sata_phy {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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@@ -133,26 +133,19 @@
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};
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};
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&gsbi4 {
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qcom,mode = <GSBI_PROT_I2C_UART>;
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status = "okay";
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serial@16340000 {
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status = "okay";
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};
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/*
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* The i2c device on gsbi4 should not be enabled.
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* On ipq806x designs gsbi4 i2c is meant for exclusive
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* RPM usage. Turning this on in kernel manifests as
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* i2c failure for the RPM.
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*/
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};
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&sata_phy {
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status = "okay";
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};
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&gsbi5 {
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status = "disabled";
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&sata {
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status = "okay";
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spi@1a280000 {
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status = "disabled";
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};
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};
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&usb3_0 {
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@@ -1,31 +0,0 @@
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#include "qcom-ipq8064.dtsi"
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/ {
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aliases {
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serial0 = &gsbi4_serial;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&CPU_SPC {
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status = "okay";
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};
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&pcie0 {
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phy-tx0-term-offset = <7>;
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};
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&pcie1 {
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phy-tx0-term-offset = <7>;
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};
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&pcie2 {
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phy-tx0-term-offset = <7>;
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};
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&sata {
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ports-implemented = <0x1>;
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};
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@@ -336,39 +336,21 @@
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};
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};
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&gsbi4 {
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status = "okay";
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qcom,mode = <GSBI_PROT_I2C_UART>;
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};
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&gsbi4_serial {
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status = "okay";
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pinctrl-0 = <&uart0_pins>;
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pinctrl-names = "default";
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};
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&gsbi5 {
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status = "okay";
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qcom,mode = <GSBI_PROT_SPI>;
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spi@1a280000 {
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status = "okay";
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pinctrl-0 = <&spi_pins>;
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pinctrl-names = "default";
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cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
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s25fl256s1@0 {
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&flash {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <50000000>;
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};
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&sata_phy {
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status = "disabled";
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};
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&sata {
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status = "disabled";
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};
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&ss_phy_0 { /* USB3 port 0 SS phy */
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@@ -0,0 +1,89 @@
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This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches
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instead of keeping a local version.
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We drop partitions, LEDs and keys from the file as we will implement
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them differently anyway.
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--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
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@@ -42,16 +42,6 @@
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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reg = <0>;
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-
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- partition@0 {
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- label = "rootfs";
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- reg = <0x0 0x1000000>;
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- };
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-
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- partition@1 {
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- label = "scratch";
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- reg = <0x1000000 0x1000000>;
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- };
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};
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};
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};
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@@ -64,64 +54,5 @@
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ports-implemented = <0x1>;
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status = "ok";
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};
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-
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- gpio_keys {
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- compatible = "gpio-keys";
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- pinctrl-0 = <&buttons_pins>;
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- pinctrl-names = "default";
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-
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- button@1 {
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- label = "reset";
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- linux,code = <KEY_RESTART>;
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- gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
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- linux,input-type = <1>;
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- debounce-interval = <60>;
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- };
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- button@2 {
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- label = "wps";
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- linux,code = <KEY_WPS_BUTTON>;
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- gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
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- linux,input-type = <1>;
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- debounce-interval = <60>;
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- };
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- };
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-
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- leds {
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- compatible = "gpio-leds";
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- pinctrl-0 = <&leds_pins>;
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- pinctrl-names = "default";
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-
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- led@7 {
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- label = "led_usb1";
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- gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
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- linux,default-trigger = "usbdev";
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- default-state = "off";
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- };
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-
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- led@8 {
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- label = "led_usb3";
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- gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
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- linux,default-trigger = "usbdev";
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- default-state = "off";
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- };
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-
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- led@9 {
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- label = "status_led_fail";
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- gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
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- default-state = "off";
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- };
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-
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- led@26 {
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- label = "sata_led";
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- gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
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- default-state = "off";
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- };
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-
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- led@53 {
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- label = "status_led_pass";
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- gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
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- default-state = "off";
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- };
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- };
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};
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};
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@@ -0,0 +1,26 @@
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This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches
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instead of keeping a local version. This patch adds our local adjustments
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for the (local) additional contents of qcom-ipq8064.dtsi
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--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
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@@ -56,3 +56,19 @@
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};
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};
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};
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+
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+&CPU_SPC {
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+ status = "okay";
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+};
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+
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+&pcie0 {
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+ phy-tx0-term-offset = <7>;
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+};
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+
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+&pcie1 {
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+ phy-tx0-term-offset = <7>;
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+};
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+
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+&pcie2 {
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+ phy-tx0-term-offset = <7>;
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+};
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Block a user