ath79: add missing clock name strings in SoC dtsi
For all SoC in the ath79 target, the PLL controller provides 3 main clocks "cpu", "ddr" and "ahb" through the input clock "ref". Signed-off-by: Shiji Yang <yangshiji66@qq.com>
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		 Shiji Yang
					Shiji Yang
				
			
				
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						 Hauke Mehrtens
						Hauke Mehrtens
					
				
			
			
				
	
			
			
			 Hauke Mehrtens
						Hauke Mehrtens
					
				
			
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			| @@ -28,6 +28,12 @@ | |||||||
| 		bootargs = "console=ttyATH0,115200"; | 		bootargs = "console=ttyATH0,115200"; | ||||||
| 	}; | 	}; | ||||||
|  |  | ||||||
|  | 	ref: ref { | ||||||
|  | 		compatible = "fixed-clock"; | ||||||
|  | 		#clock-cells = <0>; | ||||||
|  | 		clock-output-names = "ref"; | ||||||
|  | 	}; | ||||||
|  |  | ||||||
| 	ahb { | 	ahb { | ||||||
| 		apb { | 		apb { | ||||||
| 			ddr_ctrl: memory-controller@18000000 { | 			ddr_ctrl: memory-controller@18000000 { | ||||||
| @@ -83,7 +89,11 @@ | |||||||
| 				compatible = "qca,ar9330-pll"; | 				compatible = "qca,ar9330-pll"; | ||||||
| 				reg = <0x18050000 0x100>; | 				reg = <0x18050000 0x100>; | ||||||
|  |  | ||||||
|  | 				clocks = <&ref>; | ||||||
|  | 				clock-names = "ref"; | ||||||
|  |  | ||||||
| 				#clock-cells = <1>; | 				#clock-cells = <1>; | ||||||
|  | 				clock-output-names = "cpu", "ddr", "ahb"; | ||||||
| 			}; | 			}; | ||||||
|  |  | ||||||
| 			wdt: wdt@18060008 { | 			wdt: wdt@18060008 { | ||||||
|   | |||||||
| @@ -4,9 +4,4 @@ | |||||||
|  |  | ||||||
| / { | / { | ||||||
| 	compatible = "qca,ar9331"; | 	compatible = "qca,ar9331"; | ||||||
|  |  | ||||||
| 	ref: ref { |  | ||||||
| 		compatible = "fixed-clock"; |  | ||||||
| 		#clock-cells = <0>; |  | ||||||
| 	}; |  | ||||||
| }; | }; | ||||||
|   | |||||||
| @@ -104,7 +104,9 @@ | |||||||
|  |  | ||||||
| 				#clock-cells = <1>; | 				#clock-cells = <1>; | ||||||
| 				clock-output-names = "cpu", "ddr", "ahb"; | 				clock-output-names = "cpu", "ddr", "ahb"; | ||||||
|  |  | ||||||
| 				clocks = <&extosc>; | 				clocks = <&extosc>; | ||||||
|  | 				clock-names = "ref"; | ||||||
| 			}; | 			}; | ||||||
|  |  | ||||||
| 			wdt: wdt@18060008 { | 			wdt: wdt@18060008 { | ||||||
|   | |||||||
| @@ -119,6 +119,7 @@ | |||||||
| 				clock-output-names = "cpu", "ddr", "ahb"; | 				clock-output-names = "cpu", "ddr", "ahb"; | ||||||
|  |  | ||||||
| 				clocks = <&extosc>; | 				clocks = <&extosc>; | ||||||
|  | 				clock-names = "ref"; | ||||||
| 			}; | 			}; | ||||||
|  |  | ||||||
| 			wdt: wdt@18060008 { | 			wdt: wdt@18060008 { | ||||||
|   | |||||||
| @@ -95,6 +95,7 @@ | |||||||
| 				clock-output-names = "cpu", "ddr", "ahb"; | 				clock-output-names = "cpu", "ddr", "ahb"; | ||||||
|  |  | ||||||
| 				clocks = <&extosc>; | 				clocks = <&extosc>; | ||||||
|  | 				clock-names = "ref"; | ||||||
| 			}; | 			}; | ||||||
|  |  | ||||||
| 			wdt: wdt@18060008 { | 			wdt: wdt@18060008 { | ||||||
|   | |||||||
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