oxnas: fix PCIe register ranges in device-tree
They should be relative to apb-bridge@47000000 rather than to the pcie-controller@c00000 inside it. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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		| @@ -42,7 +42,7 @@ | |||||||
| +				bus-range = <0x00 0x7f>; | +				bus-range = <0x00 0x7f>; | ||||||
| + | + | ||||||
| +				/*	cfg		inbound translator	*/ | +				/*	cfg		inbound translator	*/ | ||||||
| +				reg =	<0x0 0x1000>,	<0x100000 0x100>; | +				reg =	<0xc00000 0x1000>,	<0xd00000 0x100>; | ||||||
| + | + | ||||||
| +				phys = <&pcie_phy>; | +				phys = <&pcie_phy>; | ||||||
| +				phy-names = "pcie-phy"; | +				phy-names = "pcie-phy"; | ||||||
| @@ -83,7 +83,7 @@ | |||||||
| +				bus-range = <0x80 0xff>; | +				bus-range = <0x80 0xff>; | ||||||
| + | + | ||||||
| +				/*	cfg		inbound translator	*/ | +				/*	cfg		inbound translator	*/ | ||||||
| +				reg =	<0x0 0x1000>,	<0x100000 0x100>; | +				reg =	<0xe00000 0x1000>,	<0xf00000 0x100>; | ||||||
| + | + | ||||||
| +				phys = <&pcie_phy>; | +				phys = <&pcie_phy>; | ||||||
| +				phy-names = "pcie-phy"; | +				phy-names = "pcie-phy"; | ||||||
|   | |||||||
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	 Daniel Golle
					Daniel Golle