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mpc85xx: add SPI kernel loader for TP-Link TL-WDR4900 v1

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Similar to the lzma-loader on our MIPS targets, the spi-loader acts as
a second-stage loader that will then load and start the actual kernel.
As the TL-WDR4900 uses SPI-NOR and the P1010 family does not have support
for memory mapping of this type of flash, this loader needs to contain a
basic driver for the FSL ESPI controller.

Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
This commit is contained in:
Matthias Schiffer
2022-03-27 20:57:01 +02:00
committed by David Bauer
parent 63e5ba8e69
commit a296055b82
22 changed files with 1364 additions and 0 deletions
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101
target/linux/mpc85xx/image/spi-loader/include/io.h Normal file
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// SPDX-License-Identifier: GPL-2.0-only
#pragma once
#include <stdint.h>
/*
* Low-level I/O routines.
*
* Copied from <file:arch/powerpc/include/asm/io.h> (which has no copyright)
*/
static inline uint8_t in_8(const volatile uint8_t *addr)
{
int ret;
__asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
: "=r" (ret) : "m" (*addr));
return ret;
}
static inline void out_8(volatile uint8_t *addr, uint8_t val)
{
__asm__ __volatile__("stb%U0%X0 %1,%0; sync"
: "=m" (*addr) : "r" (val));
}
static inline uint16_t in_le16(const volatile uint16_t *addr)
{
uint32_t ret;
__asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
: "=r" (ret) : "r" (addr), "m" (*addr));
return ret;
}
static inline uint16_t in_be16(const volatile uint16_t *addr)
{
uint32_t ret;
__asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
: "=r" (ret) : "m" (*addr));
return ret;
}
static inline void out_le16(volatile uint16_t *addr, uint16_t val)
{
__asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr)
: "r" (val), "r" (addr));
}
static inline void out_be16(volatile uint16_t *addr, uint16_t val)
{
__asm__ __volatile__("sth%U0%X0 %1,%0; sync"
: "=m" (*addr) : "r" (val));
}
static inline uint32_t in_le32(const volatile uint32_t *addr)
{
uint32_t ret;
__asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
: "=r" (ret) : "r" (addr), "m" (*addr));
return ret;
}
static inline uint32_t in_be32(const volatile uint32_t *addr)
{
uint32_t ret;
__asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
: "=r" (ret) : "m" (*addr));
return ret;
}
static inline void out_le32(volatile uint32_t *addr, uint32_t val)
{
__asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
: "r" (val), "r" (addr));
}
static inline void out_be32(volatile uint32_t *addr, uint32_t val)
{
__asm__ __volatile__("stw%U0%X0 %1,%0; sync"
: "=m" (*addr) : "r" (val));
}
static inline void sync(void)
{
asm volatile("sync" : : : "memory");
}
static inline void eieio(void)
{
asm volatile("eieio" : : : "memory");
}
static inline void barrier(void)
{
asm volatile("" : : : "memory");
}