mediatek: add Linksys E8450 support
The Linksys E8450, also known as Belkin RT3200, is a dual-band
IEEE 802.11bgn/ac/ax router based on MediaTek MT7622BV and
MediaTek MT7915AN chips.
FCC: K7S-03571 and K7S-03572
Hardware highlights:
- CPU: MediaTek MT7622BV (2x ARM Cortex-A53 @ 1350 MHz max.)
- RAM: 512MB DDR3
- Flash: 128MB SPI-NAND (2k+64)
- Ethernet: MT7531BE switch with 5 1000Base-T ports
CPU port connected with 2500Base-X
- WiFi 2.4 GHz: 802.11bgn 4T4R built-in antennas
MT7622VB built-in
- WiFi 5 GHz: 802.11ac/ax 4T4R built-in antennas
MT7915AN chip on-board via PCIe
MT7975AN front-end
- Buttons: Reset and WPS
- LEDS: 3 user controllable LEDs, 4 wired to switch
- USB: USB2.0, single port
- no Bluetooth (supported by SoC, not wired on board)
- Serial: JST PH 2.0MM 6 Pin connector inside device
----_____________----
[ GND RX - TX - - ]
---------------------
- JTAG: unpopulated ARM JTAG 20-pin connector (works)
This commit adds support for the device in a way that is compatible
with the vendor firmware's bootloader and dual-boot flash layout, the
resulting image can directly be flashed using the vendor firmware.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
John Crispin
committed by
Daniel Golle
Daniel Golle
parent
7a6d074824
commit
aa94e34c1d
486
target/linux/mediatek/dts/mt7622-linksys-e8450.dts
Normal file
486
target/linux/mediatek/dts/mt7622-linksys-e8450.dts
Normal file
@@ -0,0 +1,486 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include "mt7622.dtsi"
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#include "mt6380.dtsi"
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/ {
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model = "Linksys E8450";
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compatible = "linksys,e8450", "mediatek,mt7622";
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aliases {
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serial0 = &uart0;
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
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};
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cpus {
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cpu@0 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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cpu@1 {
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proc-supply = <&mt6380_vcpu_reg>;
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sram-supply = <&mt6380_vm_reg>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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factory {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led_power: power_blue {
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label = "power:blue";
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gpios = <&pio 95 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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power_orange {
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label = "power:orange";
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gpios = <&pio 96 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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inet_blue {
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label = "inet:blue";
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gpios = <&pio 97 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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inet_orange {
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label = "inet:orange";
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gpios = <&pio 98 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&bch {
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status = "okay";
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};
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&btif {
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status = "okay";
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};
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&cir {
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pinctrl-names = "default";
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pinctrl-0 = <&irrx_pins>;
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status = "okay";
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};
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ð {
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pinctrl-names = "default";
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pinctrl-0 = <ð_pins>;
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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compatible = "mediatek,mt7531";
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reg = <0>;
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reset-gpios = <&pio 54 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&pcie0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie0_pins>;
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status = "okay";
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};
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&pcie1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie1_pins>;
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status = "okay";
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};
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&slot0 {
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mt7915@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x05000>;
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};
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};
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&pio {
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/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
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* SATA functions. i.e. output-high: PCIe, output-low: SATA
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*/
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// asm_sel {
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// gpio-hog;
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// gpios = <90 GPIO_ACTIVE_HIGH>;
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// output-high;
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// };
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eth_pins: eth-pins {
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mux {
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function = "eth";
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groups = "mdc_mdio", "rgmii_via_gmac2";
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};
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};
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irrx_pins: irrx-pins {
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mux {
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function = "ir";
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groups = "ir_1_rx";
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};
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};
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irtx_pins: irtx-pins {
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mux {
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function = "ir";
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groups = "ir_1_tx";
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};
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};
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pcie0_pins: pcie0-pins {
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mux {
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function = "pcie";
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groups = "pcie0_pad_perst",
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"pcie0_1_waken",
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"pcie0_1_clkreq";
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};
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};
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pcie1_pins: pcie1-pins {
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mux {
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function = "pcie";
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groups = "pcie1_pad_perst",
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"pcie1_0_waken",
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"pcie1_0_clkreq";
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};
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};
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pmic_bus_pins: pmic-bus-pins {
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mux {
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function = "pmic";
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groups = "pmic_bus";
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};
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};
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pwm7_pins: pwm1-2-pins {
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mux {
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function = "pwm";
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groups = "pwm_ch7_2";
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};
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};
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wled_pins: wled-pins {
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mux {
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function = "led";
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groups = "wled";
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};
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};
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/* Serial NAND is shared pin with SPI-NOR */
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serial_nand_pins: serial-nand-pins {
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mux {
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function = "flash";
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groups = "snfi";
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};
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};
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spic0_pins: spic0-pins {
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mux {
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function = "spi";
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groups = "spic0_0";
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};
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};
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spic1_pins: spic1-pins {
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mux {
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function = "spi";
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groups = "spic1_0";
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};
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};
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uart0_pins: uart0-pins {
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mux {
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function = "uart";
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groups = "uart0_0_tx_rx" ;
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};
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};
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uart2_pins: uart2-pins {
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mux {
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function = "uart";
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groups = "uart2_1_tx_rx" ;
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};
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};
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watchdog_pins: watchdog-pins {
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mux {
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function = "watchdog";
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groups = "watchdog";
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};
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};
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};
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&pwm {
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pinctrl-names = "default";
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pinctrl-0 = <&pwm7_pins>;
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status = "okay";
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};
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&pwrap {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_bus_pins>;
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status = "okay";
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};
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&sata {
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status = "disabled";
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};
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&sata_phy {
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status = "disabled";
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};
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&snfi {
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pinctrl-names = "default";
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pinctrl-0 = <&serial_nand_pins>;
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status = "okay";
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spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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spi-max-frequency = <104000000>;
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reg = <0>;
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mediatek,bmt-v2;
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mediatek,bmt-table-size = <0x1000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Preloader";
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reg = <0x00000 0x0080000>;
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read-only;
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};
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partition@80000 {
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label = "ATF";
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reg = <0x80000 0x0040000>;
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};
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partition@c0000 {
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label = "u-boot";
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reg = <0xc0000 0x0080000>;
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};
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partition@140000 {
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label = "u-boot-env";
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reg = <0x140000 0x0080000>;
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};
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factory: partition@1c0000 {
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label = "factory";
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reg = <0x1c0000 0x0100000>;
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};
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partition@300000 {
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label = "devinfo";
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reg = <0x300000 0x020000>;
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};
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partition@320000 {
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label = "senv";
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reg = <0x320000 0x020000>;
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};
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partition@360000 {
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label = "bootseq";
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reg = <0x360000 0x020000>;
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};
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partition@500000 {
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label = "firmware1";
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compatible = "denx,fit";
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openwrt,cmdline-match = "mtdparts=master";
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reg = <0x500000 0x1E00000>;
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};
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partition@2300000 {
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label = "firmware2";
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compatible = "denx,fit";
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openwrt,cmdline-match = "mtdparts=slave";
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reg = <0x2300000 0x1E00000>;
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};
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partition@4100000 {
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label = "data";
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reg = <0x4100000 0x1900000>;
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};
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partition@5100000 {
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label = "mfg";
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reg = <0x5a00000 0x1400000>;
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};
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spic0_pins>;
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status = "okay";
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spic1_pins>;
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status = "okay";
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};
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&ssusb {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_5v>;
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status = "okay";
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};
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&u3phy {
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&watchdog {
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pinctrl-names = "default";
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pinctrl-0 = <&watchdog_pins>;
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status = "okay";
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};
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&wmac {
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mediatek,mtd-eeprom = <&factory 0x0000>;
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status = "okay";
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};
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@@ -38,6 +38,18 @@ define Device/elecom_wrc-2533gent
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endef
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TARGET_DEVICES += elecom_wrc-2533gent
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define Device/linksys_e8450
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DEVICE_VENDOR := Linksys
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DEVICE_MODEL := E8450
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DEVICE_ALT0_VENDOR := Belkin
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DEVICE_ALT0_MODEL := RT3200
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DEVICE_DTS := mt7622-linksys-e8450
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DEVICE_DTS_DIR := ../dts
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DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk \
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kmod-mt7615e kmod-mt7615-firmware kmod-mt7915e
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endef
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TARGET_DEVICES += linksys_e8450
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define Device/mediatek_mt7622-rfb1
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DEVICE_VENDOR := MediaTek
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DEVICE_MODEL := MTK7622 rfb1 AP
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18
target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
Executable file
18
target/linux/mediatek/mt7622/base-files/etc/board.d/01_leds
Executable file
@@ -0,0 +1,18 @@
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#!/bin/sh
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. /lib/functions/leds.sh
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. /lib/functions/uci-defaults.sh
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board=$(board_name)
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board_config_update
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case $board in
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linksys,e8450)
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ucidef_set_led_netdev "wan" "WAN" "inet:blue" "wan"
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;;
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esac
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board_config_flush
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exit 0
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@@ -10,9 +10,8 @@ mediatek_setup_interfaces()
|
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|
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case $board in
|
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bananapi,bpi-r64-rootdisk|\
|
||||
bananapi,bpi-r64)
|
||||
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" wan
|
||||
;;
|
||||
bananapi,bpi-r64|\
|
||||
linksys,e8450|\
|
||||
mediatek,mt7622-rfb1)
|
||||
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan
|
||||
;;
|
||||
@@ -31,7 +30,15 @@ mediatek_setup_macs()
|
||||
local board="$1"
|
||||
|
||||
case $board in
|
||||
linksys,e8450)
|
||||
wan_mac=$(mtd_get_mac_ascii devinfo wan_mac_addr)
|
||||
lan_mac=$(mtd_get_mac_ascii devinfo lan_mac_addr)
|
||||
label_mac=$wan_mac
|
||||
;;
|
||||
esac
|
||||
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac
|
||||
[ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac
|
||||
[ -n "$label_mac" ] && ucidef_set_label_macaddr $label_mac
|
||||
}
|
||||
|
||||
board_config_update
|
||||
|
||||
11
target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
Executable file
11
target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
Executable file
@@ -0,0 +1,11 @@
|
||||
#!/bin/sh /etc/rc.common
|
||||
|
||||
START=99
|
||||
|
||||
boot() {
|
||||
case $(board_name) in
|
||||
linksys,e8450)
|
||||
mtd erase senv || true
|
||||
;;
|
||||
esac
|
||||
}
|
||||
@@ -10,6 +10,14 @@ platform_do_upgrade() {
|
||||
mediatek,mt7622,ubi)
|
||||
nand_do_upgrade "$1"
|
||||
;;
|
||||
linksys,e8450)
|
||||
if grep -q mtdparts=slave /proc/cmdline; then
|
||||
PART_NAME=firmware2
|
||||
else
|
||||
PART_NAME=firmware1
|
||||
fi
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
*)
|
||||
default_do_upgrade "$1"
|
||||
;;
|
||||
|
||||
@@ -0,0 +1,122 @@
|
||||
From ea0df4552efcdcc2806fe6eba0540b5f719d80b6 Mon Sep 17 00:00:00 2001
|
||||
From: Davide Fioravanti <pantanastyle@gmail.com>
|
||||
Date: Fri, 8 Jan 2021 15:35:24 +0100
|
||||
Subject: [PATCH 1/1] mtd: spinand: Add support for the Fidelix FM35X1GA
|
||||
|
||||
Datasheet: http://www.hobos.com.cn/upload/datasheet/DS35X1GAXXX_100_rev00.pdf
|
||||
|
||||
Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
|
||||
---
|
||||
drivers/mtd/nand/spi/Makefile | 2 +-
|
||||
drivers/mtd/nand/spi/core.c | 1 +
|
||||
drivers/mtd/nand/spi/fidelix.c | 80 ++++++++++++++++++++++++++++++++++
|
||||
include/linux/mtd/spinand.h | 1 +
|
||||
4 files changed, 83 insertions(+), 1 deletion(-)
|
||||
create mode 100644 drivers/mtd/nand/spi/fidelix.c
|
||||
|
||||
--- a/drivers/mtd/nand/spi/Makefile
|
||||
+++ b/drivers/mtd/nand/spi/Makefile
|
||||
@@ -1,3 +1,3 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
|
||||
+spinand-objs := core.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
|
||||
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
|
||||
--- a/drivers/mtd/nand/spi/core.c
|
||||
+++ b/drivers/mtd/nand/spi/core.c
|
||||
@@ -755,6 +755,7 @@ static const struct nand_ops spinand_ops
|
||||
};
|
||||
|
||||
static const struct spinand_manufacturer *spinand_manufacturers[] = {
|
||||
+ &fidelix_spinand_manufacturer,
|
||||
&gigadevice_spinand_manufacturer,
|
||||
¯onix_spinand_manufacturer,
|
||||
µn_spinand_manufacturer,
|
||||
--- /dev/null
|
||||
+++ b/drivers/mtd/nand/spi/fidelix.c
|
||||
@@ -0,0 +1,76 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Copyright (c) 2020 Davide Fioravanti <pantanastyle@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/device.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/mtd/spinand.h>
|
||||
+
|
||||
+#define SPINAND_MFR_FIDELIX 0xE5
|
||||
+#define FIDELIX_ECCSR_MASK 0x0F
|
||||
+
|
||||
+static SPINAND_OP_VARIANTS(read_cache_variants,
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
|
||||
+
|
||||
+static SPINAND_OP_VARIANTS(write_cache_variants,
|
||||
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
|
||||
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
|
||||
+
|
||||
+static SPINAND_OP_VARIANTS(update_cache_variants,
|
||||
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
|
||||
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
|
||||
+
|
||||
+static int fm35x1ga_ooblayout_ecc(struct mtd_info *mtd, int section,
|
||||
+ struct mtd_oob_region *region)
|
||||
+{
|
||||
+ if (section > 3)
|
||||
+ return -ERANGE;
|
||||
+
|
||||
+ region->offset = (16 * section) + 8;
|
||||
+ region->length = 8;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int fm35x1ga_ooblayout_free(struct mtd_info *mtd, int section,
|
||||
+ struct mtd_oob_region *region)
|
||||
+{
|
||||
+ if (section > 3)
|
||||
+ return -ERANGE;
|
||||
+
|
||||
+ region->offset = (16 * section) + 2;
|
||||
+ region->length = 6;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct mtd_ooblayout_ops fm35x1ga_ooblayout = {
|
||||
+ .ecc = fm35x1ga_ooblayout_ecc,
|
||||
+ .free = fm35x1ga_ooblayout_free,
|
||||
+};
|
||||
+
|
||||
+static const struct spinand_info fidelix_spinand_table[] = {
|
||||
+ SPINAND_INFO("FM35X1GA",
|
||||
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),
|
||||
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
|
||||
+ NAND_ECCREQ(4, 512),
|
||||
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||
+ &write_cache_variants,
|
||||
+ &update_cache_variants),
|
||||
+ SPINAND_HAS_QE_BIT,
|
||||
+ SPINAND_ECCINFO(&fm35x1ga_ooblayout, NULL)),
|
||||
+};
|
||||
+
|
||||
+static const struct spinand_manufacturer_ops fidelix_spinand_manuf_ops = {
|
||||
+};
|
||||
+
|
||||
+const struct spinand_manufacturer fidelix_spinand_manufacturer = {
|
||||
+ .id = SPINAND_MFR_FIDELIX,
|
||||
+ .name = "Fidelix",
|
||||
+ .chips = fidelix_spinand_table,
|
||||
+ .nchips = ARRAY_SIZE(fidelix_spinand_table),
|
||||
+ .ops = &fidelix_spinand_manuf_ops,
|
||||
+};
|
||||
--- a/include/linux/mtd/spinand.h
|
||||
+++ b/include/linux/mtd/spinand.h
|
||||
@@ -238,6 +238,7 @@ struct spinand_manufacturer {
|
||||
};
|
||||
|
||||
/* SPI NAND manufacturers */
|
||||
+extern const struct spinand_manufacturer fidelix_spinand_manufacturer;
|
||||
extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
|
||||
extern const struct spinand_manufacturer macronix_spinand_manufacturer;
|
||||
extern const struct spinand_manufacturer micron_spinand_manufacturer;
|
||||
Reference in New Issue
Block a user