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kernel: update 3.10 to 3.10.17

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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 38506
This commit is contained in:
Gabor Juhos
2013-10-23 12:51:05 +00:00
parent d8d0e2c536
commit b6b06000eb
43 changed files with 161 additions and 376 deletions
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92
target/linux/ramips/patches-3.10/0122-pinmux.patch
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@@ -14,11 +14,9 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
6 files changed, 385 insertions(+), 19 deletions(-)
create mode 100644 drivers/pinctrl/pinctrl-rt2880.c
Index: linux-3.10.13/arch/mips/Kconfig
===================================================================
--- linux-3.10.13.orig/arch/mips/Kconfig 2013-10-02 16:59:28.532051276 +0200
+++ linux-3.10.13/arch/mips/Kconfig 2013-10-02 16:59:29.440051316 +0200
@@ -446,6 +446,8 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -446,6 +446,8 @@ config RALINK
select HAVE_MACH_CLKDEV
select CLKDEV_LOOKUP
select ARCH_REQUIRE_GPIOLIB
@@ -27,11 +25,9 @@ Index: linux-3.10.13/arch/mips/Kconfig
config SGI_IP22
bool "SGI IP22 (Indy/Indigo2)"
Index: linux-3.10.13/drivers/pinctrl/Kconfig
===================================================================
--- linux-3.10.13.orig/drivers/pinctrl/Kconfig 2013-09-27 02:18:49.000000000 +0200
+++ linux-3.10.13/drivers/pinctrl/Kconfig 2013-10-02 16:59:29.440051316 +0200
@@ -114,6 +114,11 @@
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -114,6 +114,11 @@ config PINCTRL_LANTIQ
select PINMUX
select PINCONF
@@ -43,11 +39,9 @@ Index: linux-3.10.13/drivers/pinctrl/Kconfig
config PINCTRL_FALCON
bool
depends on SOC_FALCON
Index: linux-3.10.13/drivers/pinctrl/Makefile
===================================================================
--- linux-3.10.13.orig/drivers/pinctrl/Makefile 2013-09-27 02:18:49.000000000 +0200
+++ linux-3.10.13/drivers/pinctrl/Makefile 2013-10-02 16:59:29.440051316 +0200
@@ -45,6 +45,7 @@
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_PINCTRL_EXYNOS5440) += pinc
obj-$(CONFIG_PINCTRL_S3C64XX) += pinctrl-s3c64xx.o
obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
@@ -55,10 +49,8 @@ Index: linux-3.10.13/drivers/pinctrl/Makefile
obj-$(CONFIG_PLAT_ORION) += mvebu/
obj-$(CONFIG_ARCH_SHMOBILE) += sh-pfc/
Index: linux-3.10.13/drivers/pinctrl/pinctrl-rt2880.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-3.10.13/drivers/pinctrl/pinctrl-rt2880.c 2013-10-02 18:24:18.556268869 +0200
--- /dev/null
+++ b/drivers/pinctrl/pinctrl-rt2880.c
@@ -0,0 +1,456 @@
+/*
+ * linux/drivers/pinctrl/pinctrl-rt2880.c
@@ -516,10 +508,8 @@ Index: linux-3.10.13/drivers/pinctrl/pinctrl-rt2880.c
+}
+
+core_initcall_sync(rt2880_pinmux_init);
Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/pinmux.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-3.10.13/arch/mips/include/asm/mach-ralink/pinmux.h 2013-10-02 16:59:29.444051317 +0200
--- /dev/null
+++ b/arch/mips/include/asm/mach-ralink/pinmux.h
@@ -0,0 +1,47 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
@@ -568,10 +558,8 @@ Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/pinmux.h
+extern struct rt2880_pmx_group *rt2880_pinmux_data;
+
+#endif
Index: linux-3.10.13/arch/mips/ralink/mt7620.c
===================================================================
--- linux-3.10.13.orig/arch/mips/ralink/mt7620.c 2013-10-02 16:59:28.912051293 +0200
+++ linux-3.10.13/arch/mips/ralink/mt7620.c 2013-10-02 18:23:35.940267055 +0200
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -17,6 +17,7 @@
#include <asm/mipsregs.h>
#include <asm/mach-ralink/ralink_regs.h>
@@ -580,7 +568,7 @@ Index: linux-3.10.13/arch/mips/ralink/mt7620.c
#include "common.h"
@@ -48,118 +49,40 @@
@@ -48,118 +49,40 @@ static int dram_type;
/* the pll dividers */
static u32 mt7620_clk_divider[] = { 2, 3, 4, 8 };
@@ -732,17 +720,15 @@ Index: linux-3.10.13/arch/mips/ralink/mt7620.c
};
void __init ralink_clk_init(void)
@@ -281,4 +204,6 @@
@@ -281,4 +204,6 @@ void prom_soc_init(struct ralink_soc_inf
(pmu0 & PMU_SW_SET) ? ("sw") : ("hw"));
pr_info("Digital PMU set to %s control\n",
(pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
+
+ rt2880_pinmux_data = mt7620a_pinmux_data;
}
Index: linux-3.10.13/arch/mips/ralink/rt305x.c
===================================================================
--- linux-3.10.13.orig/arch/mips/ralink/rt305x.c 2013-10-02 16:59:29.140051302 +0200
+++ linux-3.10.13/arch/mips/ralink/rt305x.c 2013-10-02 16:59:29.444051317 +0200
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -17,90 +17,71 @@
#include <asm/mipsregs.h>
#include <asm/mach-ralink/ralink_regs.h>
@@ -892,7 +878,7 @@ Index: linux-3.10.13/arch/mips/ralink/rt305x.c
};
static void rt305x_wdt_reset(void)
@@ -114,14 +95,6 @@
@@ -114,14 +95,6 @@ static void rt305x_wdt_reset(void)
rt_sysc_w32(t, SYSC_REG_SYSTEM_CONFIG);
}
@@ -907,7 +893,7 @@ Index: linux-3.10.13/arch/mips/ralink/rt305x.c
static unsigned long rt5350_get_mem_size(void)
{
void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
@@ -291,11 +264,14 @@
@@ -291,11 +264,14 @@ void prom_soc_init(struct ralink_soc_inf
soc_info->mem_base = RT305X_SDRAM_BASE;
if (soc_is_rt5350()) {
soc_info->mem_size = rt5350_get_mem_size();
@@ -922,11 +908,9 @@ Index: linux-3.10.13/arch/mips/ralink/rt305x.c
+ rt2880_pinmux_data = rt3352_pinmux_data;
}
}
Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/rt305x.h
===================================================================
--- linux-3.10.13.orig/arch/mips/include/asm/mach-ralink/rt305x.h 2013-09-27 02:18:49.000000000 +0200
+++ linux-3.10.13/arch/mips/include/asm/mach-ralink/rt305x.h 2013-10-02 16:59:29.444051317 +0200
@@ -125,24 +125,28 @@
--- a/arch/mips/include/asm/mach-ralink/rt305x.h
+++ b/arch/mips/include/asm/mach-ralink/rt305x.h
@@ -125,24 +125,28 @@ static inline int soc_is_rt5350(void)
#define RT305X_GPIO_GE0_TXD0 40
#define RT305X_GPIO_GE0_RXCLK 51
@@ -970,10 +954,8 @@ Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/rt305x.h
#define RT3352_SYSC_REG_SYSCFG0 0x010
#define RT3352_SYSC_REG_SYSCFG1 0x014
Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/mt7620.h
===================================================================
--- linux-3.10.13.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2013-10-02 16:59:28.708051287 +0200
+++ linux-3.10.13/arch/mips/include/asm/mach-ralink/mt7620.h 2013-10-02 16:59:29.444051317 +0200
--- a/arch/mips/include/asm/mach-ralink/mt7620.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620.h
@@ -59,7 +59,6 @@
#define MT7620_DDR2_SIZE_MIN 32
#define MT7620_DDR2_SIZE_MAX 256
@@ -1010,10 +992,8 @@ Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/mt7620.h
+#define MT7620_GPIO_MODE_WDT 22
#endif
Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/rt3883.h
===================================================================
--- linux-3.10.13.orig/arch/mips/include/asm/mach-ralink/rt3883.h 2013-09-27 02:18:49.000000000 +0200
+++ linux-3.10.13/arch/mips/include/asm/mach-ralink/rt3883.h 2013-10-02 16:59:29.444051317 +0200
--- a/arch/mips/include/asm/mach-ralink/rt3883.h
+++ b/arch/mips/include/asm/mach-ralink/rt3883.h
@@ -112,8 +112,6 @@
#define RT3883_CLKCFG1_PCI_CLK_EN BIT(19)
#define RT3883_CLKCFG1_UPHY0_CLK_EN BIT(18)
@@ -1044,10 +1024,8 @@ Index: linux-3.10.13/arch/mips/include/asm/mach-ralink/rt3883.h
#define RT3883_GPIO_MODE_PCI_SHIFT 11
#define RT3883_GPIO_MODE_PCI_MASK 0x7
#define RT3883_GPIO_MODE_PCI (RT3883_GPIO_MODE_PCI_MASK << RT3883_GPIO_MODE_PCI_SHIFT)
Index: linux-3.10.13/arch/mips/ralink/common.h
===================================================================
--- linux-3.10.13.orig/arch/mips/ralink/common.h 2013-10-02 16:59:28.532051276 +0200
+++ linux-3.10.13/arch/mips/ralink/common.h 2013-10-02 16:59:29.444051317 +0200
--- a/arch/mips/ralink/common.h
+++ b/arch/mips/ralink/common.h
@@ -11,25 +11,6 @@
#define RAMIPS_SYS_TYPE_LEN 32
@@ -1074,10 +1052,8 @@ Index: linux-3.10.13/arch/mips/ralink/common.h
struct ralink_soc_info {
unsigned char sys_type[RAMIPS_SYS_TYPE_LEN];
unsigned char *compatible;
Index: linux-3.10.13/arch/mips/ralink/rt3883.c
===================================================================
--- linux-3.10.13.orig/arch/mips/ralink/rt3883.c 2013-09-27 02:18:49.000000000 +0200
+++ linux-3.10.13/arch/mips/ralink/rt3883.c 2013-10-02 16:59:29.444051317 +0200
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
@@ -17,132 +17,50 @@
#include <asm/mipsregs.h>
#include <asm/mach-ralink/ralink_regs.h>
@@ -1249,7 +1225,7 @@ Index: linux-3.10.13/arch/mips/ralink/rt3883.c
};
static void rt3883_wdt_reset(void)
@@ -155,17 +73,6 @@
@@ -155,17 +73,6 @@ static void rt3883_wdt_reset(void)
rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);
}
@@ -1267,7 +1243,7 @@ Index: linux-3.10.13/arch/mips/ralink/rt3883.c
void __init ralink_clk_init(void)
{
unsigned long cpu_rate, sys_rate;
@@ -243,4 +150,6 @@
@@ -243,4 +150,6 @@ void prom_soc_init(struct ralink_soc_inf
soc_info->mem_base = RT3883_SDRAM_BASE;
soc_info->mem_size_min = RT3883_MEM_SIZE_MIN;
soc_info->mem_size_max = RT3883_MEM_SIZE_MAX;