mac80211: fix QCA9561 PA bias
This patch fixes an invalid TX PA DC bias level on QCA9561, which
results in a very low output power and very low throughput as devices
are further away from the AP (compared to other 2.4GHz APs),
following a suggestion from nbd[1].
This patch has been submitted upstream[2].
[1] https://lore.kernel.org/all/91c58969-c60e-2f41-00ac-737786d435ae@nbd.name
[2] https://lore.kernel.org/linux-wireless/20220417145145.1847-1-hacks+kernel@slashdirt.org/
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
(cherry picked from commit 7dc52a78ae)
			
			
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From 4509e523dba46f789377cfec6f20579adf743416 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Thibaut=20VAR=C3=88NE?= <hacks+kernel@slashdirt.org>
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Date: Sun, 17 Apr 2022 11:31:35 +0200
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Subject: [PATCH v2] ath9k: fix QCA9561 PA bias level
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This patch fixes an invalid TX PA DC bias level on QCA9561, which
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results in a very low output power and very low throughput as devices
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are further away from the AP (compared to other 2.4GHz APs).
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This patch was suggested by Felix Fietkau, who noted[1]:
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"The value written to that register is wrong, because while the mask
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definition AR_CH0_TOP2_XPABIASLVL uses a different value for 9561, the
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shift definition AR_CH0_TOP2_XPABIASLVL_S is hardcoded to 12, which is
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wrong for 9561."
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In real life testing, without this patch the 2.4GHz throughput on
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Yuncore XD3200 is around 10Mbps sitting next to the AP, and closer to
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practical maximum with the patch applied.
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[1] https://lore.kernel.org/all/91c58969-c60e-2f41-00ac-737786d435ae@nbd.name
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Signed-off-by: Thibaut VARÈNE <hacks+kernel@slashdirt.org>
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---
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v2: Adjust #define per Felix's suggestion
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---
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 drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 +-
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 1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
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index a171dbb29..ad949eb02 100644
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--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
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@@ -720,7 +720,7 @@
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 #define AR_CH0_TOP2		(AR_SREV_9300(ah) ? 0x1628c : \
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 					(AR_SREV_9462(ah) ? 0x16290 : 0x16284))
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 #define AR_CH0_TOP2_XPABIASLVL		(AR_SREV_9561(ah) ? 0x1e00 : 0xf000)
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-#define AR_CH0_TOP2_XPABIASLVL_S	12
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+#define AR_CH0_TOP2_XPABIASLVL_S	(AR_SREV_9561(ah) ? 9 : 12)
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 #define AR_CH0_XTAL		(AR_SREV_9300(ah) ? 0x16294 : \
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 				 ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x16298 : \
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-- 
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2.30.2
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