cleanup atheros wifi handling
Signed-off-by: Andrej Vlašić <andrej.vlasic0@gmail.com> Signed-off-by: Luka Perkov <openwrt@lukaperkov.net> SVN-Revision: 31064
This commit is contained in:
		@@ -10,12 +10,16 @@
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#include <linux/init.h>
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					#include <linux/init.h>
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#include <linux/platform_device.h>
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					#include <linux/platform_device.h>
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#include <linux/ath5k_platform.h>
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					#include <linux/ath5k_platform.h>
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					#include <linux/ath9k_platform.h>
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#include <linux/pci.h>
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					#include <linux/pci.h>
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#include "dev-wifi-ath5k.h"
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					#include "dev-wifi-athxk.h"
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extern int (*ltqpci_plat_dev_init)(struct pci_dev *dev);
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					extern int (*ltqpci_plat_dev_init)(struct pci_dev *dev);
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struct ath5k_platform_data ath5k_pdata;
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					struct ath5k_platform_data ath5k_pdata;
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					struct ath9k_platform_data ath9k_pdata = {
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						.led_pin = -1,
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					};
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static int
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					static int
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ath5k_pci_plat_dev_init(struct pci_dev *dev)
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					ath5k_pci_plat_dev_init(struct pci_dev *dev)
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@@ -24,6 +28,13 @@ ath5k_pci_plat_dev_init(struct pci_dev *dev)
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	return 0;
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						return 0;
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}
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					}
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					static int
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					ath9k_pci_plat_dev_init(struct pci_dev *dev)
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					{
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						dev->dev.platform_data = &ath9k_pdata;
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						return 0;
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					}
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void __init
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					void __init
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ltq_register_ath5k(u16 *eeprom_data, u8 *macaddr)
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					ltq_register_ath5k(u16 *eeprom_data, u8 *macaddr)
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{
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					{
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@@ -31,3 +42,11 @@ ltq_register_ath5k(u16 *eeprom_data, u8 *macaddr)
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	ath5k_pdata.macaddr = macaddr;
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						ath5k_pdata.macaddr = macaddr;
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	ltqpci_plat_dev_init = ath5k_pci_plat_dev_init;
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						ltqpci_plat_dev_init = ath5k_pci_plat_dev_init;
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}
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					}
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					void __init
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					ltq_register_ath9k(u16 *eeprom_data, u8 *macaddr)
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					{
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						memcpy(ath9k_pdata.eeprom_data, eeprom_data, sizeof(ath9k_pdata.eeprom_data));
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						ath9k_pdata.macaddr = macaddr;
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						ltqpci_plat_dev_init = ath9k_pci_plat_dev_init;
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					}
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@@ -7,9 +7,10 @@
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 *  by the Free Software Foundation.
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					 *  by the Free Software Foundation.
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 */
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					 */
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#ifndef _DEV_WIFI_ATH5K_H__
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					#ifndef _DEV_WIFI_ATHXK_H__
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#define _DEV_WIFI_ATH5K_H__
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					#define _DEV_WIFI_ATHXK_H__
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extern void ltq_register_ath5k(u16 *eeprom_data, u8 *macaddr);
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					extern void ltq_register_ath5k(u16 *eeprom_data, u8 *macaddr);
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					extern void ltq_register_ath9k(u16 *eeprom_data, u8 *macaddr);
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#endif
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					#endif
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@@ -0,0 +1,109 @@
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					/*
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					 *  Atheros AP94 reference board PCI initialization
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					 *
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					 *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
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					 *
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					 *  This program is free software; you can redistribute it and/or modify it
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					 *  under the terms of the GNU General Public License version 2 as published
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					 *  by the Free Software Foundation.
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					 */
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					#include <linux/pci.h>
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					#include <linux/init.h>
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					#include <linux/delay.h>
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					#include <lantiq_soc.h>
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					#define LTQ_PCI_MEM_BASE		0x18000000
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					struct ath_fixup {
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						u16		*cal_data;
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						unsigned	slot;
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					};
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					static int ath_num_fixups;
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					static struct ath_fixup ath_fixups[2];
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					static void ath_pci_fixup(struct pci_dev *dev)
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					{
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						void __iomem *mem;
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						u16 *cal_data = NULL;
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						u16 cmd;
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						u32 bar0;
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						u32 val;
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						unsigned i;
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						for (i = 0; i < ath_num_fixups; i++) {
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							if (ath_fixups[i].cal_data == NULL)
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								continue;
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							if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
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								continue;
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							cal_data = ath_fixups[i].cal_data;
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							break;
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						}
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						if (cal_data == NULL)
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							return;
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						if (*cal_data != 0xa55a) {
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							pr_err("pci %s: invalid calibration data\n", pci_name(dev));
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							return;
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						}
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						pr_info("pci %s: fixup device configuration\n", pci_name(dev));
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						mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
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						if (!mem) {
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							pr_err("pci %s: ioremap error\n", pci_name(dev));
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							return;
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						}
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						pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
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						pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
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						pci_read_config_word(dev, PCI_COMMAND, &cmd);
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						cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
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						pci_write_config_word(dev, PCI_COMMAND, cmd);
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						/* set pointer to first reg address */
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						cal_data += 3;
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						while (*cal_data != 0xffff) {
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							u32 reg;
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							reg = *cal_data++;
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							val = *cal_data++;
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							val |= (*cal_data++) << 16;
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							ltq_w32(swab32(val), mem + reg);
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							udelay(100);
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						}
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						pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
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						dev->vendor = val & 0xffff;
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						dev->device = (val >> 16) & 0xffff;
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						pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
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						dev->revision = val & 0xff;
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						dev->class = val >> 8; /* upper 3 bytes */
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						pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n", 
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							pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
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						pci_read_config_word(dev, PCI_COMMAND, &cmd);
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						cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
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						pci_write_config_word(dev, PCI_COMMAND, cmd);
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						pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
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						iounmap(mem);
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					}
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					DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
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					void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
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					{
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						if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
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							return;
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						ath_fixups[ath_num_fixups].slot = slot;
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						ath_fixups[ath_num_fixups].cal_data = cal_data;
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						ath_num_fixups++;
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					}
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@@ -0,0 +1,6 @@
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					#ifndef _PCI_ATH_FIXUP
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					#define _PCI_ATH_FIXUP
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					void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
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					#endif /* _PCI_ATH_FIXUP */
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