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brcm2708: update against latest rpi-3.10.y branch

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Update our copies of the brcm2708 patches to the latest rpi-3.10-y
rebased against linux-3.10.y stable (3.10.32). This should hopefully
make it easier for us in the future to leverage the raspberry/rpi-*
branches.

Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 39770
This commit is contained in:
Florian Fainelli
2014-02-28 20:30:08 +00:00
parent c6c0d09f85
commit bb39b8d99a
180 changed files with 358176 additions and 11796 deletions
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62
target/linux/brcm2708/patches-3.10/0080-Fix-function-tracing.patch Normal file
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@@ -0,0 +1,62 @@
From f7785b067f07e444934fe0e6c31fff36f5863079 Mon Sep 17 00:00:00 2001
From: Gordon Hollingworth <gordon@holliweb.co.uk>
Date: Mon, 8 Jul 2013 04:12:19 +0100
Subject: [PATCH 080/174] Fix function tracing
---
drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c
@@ -77,7 +77,7 @@ int queued_port[MAX_EPS_CHANNELS];
#ifdef FIQ_DEBUG
char buffer[1000*16];
int wptr;
-void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
+void notrace _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...)
{
FIQDBG_T dbg_lvl_req = FIQDBG_PORTHUB;
va_list args;
@@ -101,7 +101,7 @@ void _fiq_print(FIQDBG_T dbg_lvl, char *
}
#endif
-void fiq_queue_request(int channel, int odd_frame)
+void notrace fiq_queue_request(int channel, int odd_frame)
{
hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) };
hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) };
@@ -147,7 +147,7 @@ static int last_sof = -1;
*/
int diff;
-int fiq_sof_handle(hfnum_data_t hfnum)
+int notrace fiq_sof_handle(hfnum_data_t hfnum)
{
int handled = 0;
int i;
@@ -206,12 +206,12 @@ int fiq_sof_handle(hfnum_data_t hfnum)
return handled;
}
-int port_id(hcsplt_data_t hcsplt)
+int notrace port_id(hcsplt_data_t hcsplt)
{
return hcsplt.b.prtaddr + (hcsplt.b.hubaddr << 8);
}
-int fiq_hcintr_handle(int channel, hfnum_data_t hfnum)
+int notrace fiq_hcintr_handle(int channel, hfnum_data_t hfnum)
{
hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) };
hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) };
@@ -361,7 +361,7 @@ gintmsk_data_t gintmsk;
gintsts_data_t triggered, handled, keep;
hfnum_data_t hfnum;
-void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void)
+void __attribute__ ((naked)) notrace dwc_otg_hcd_handle_fiq(void)
{
/* entry takes care to store registers we will be treading on here */