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atheros[ar2315-spiflash]: remove duplicated definitions

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Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

SVN-Revision: 41325
This commit is contained in:
John Crispin
2014-06-24 18:13:47 +00:00
parent 78bdfeb30b
commit bcc7374d7d
2 changed files with 5 additions and 33 deletions
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20
target/linux/atheros/patches-3.10/100-board.patch
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@@ -713,7 +713,7 @@
+#endif /* __ASM_MIPS_MACH_ATHEROS_WAR_H */ +#endif /* __ASM_MIPS_MACH_ATHEROS_WAR_H */
--- /dev/null --- /dev/null
+++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h +++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
@@ -0,0 +1,615 @@ @@ -0,0 +1,597 @@
+/* +/*
+ * Register definitions for AR2315+ + * Register definitions for AR2315+
+ * + *
@@ -1112,24 +1112,6 @@
+#define SDRAM_BANKADDR_BITS_S 3 +#define SDRAM_BANKADDR_BITS_S 3
+ +
+/* +/*
+ * SPI Flash Interface Registers
+ */
+
+#define AR2315_SPI_CTL (AR2315_SPI + 0x00)
+#define AR2315_SPI_OPCODE (AR2315_SPI + 0x04)
+#define AR2315_SPI_DATA (AR2315_SPI + 0x08)
+
+#define SPI_CTL_START 0x00000100
+#define SPI_CTL_BUSY 0x00010000
+#define SPI_CTL_TXCNT_MASK 0x0000000f
+#define SPI_CTL_RXCNT_MASK 0x000000f0
+#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff
+#define SPI_CTL_SIZE_MASK 0x00060000
+
+#define SPI_CTL_CLK_SEL_MASK 0x03000000
+#define SPI_OPCODE_MASK 0x000000ff
+
+/*
+ * PCI Bus Interface Registers + * PCI Bus Interface Registers
+ */ + */
+#define AR2315_PCI_1MS_REG (AR2315_PCI + 0x0008) +#define AR2315_PCI_1MS_REG (AR2315_PCI + 0x0008)

18
target/linux/atheros/patches-3.10/120-spiflash.patch
View File

@@ -562,7 +562,7 @@
+ +
--- /dev/null --- /dev/null
+++ b/drivers/mtd/devices/ar2315_spiflash.h +++ b/drivers/mtd/devices/ar2315_spiflash.h
@@ -0,0 +1,116 @@ @@ -0,0 +1,106 @@
+/* +/*
+ * Atheros AR2315 SPI Flash Memory support header file. + * Atheros AR2315 SPI Flash Memory support header file.
+ * + *
@@ -651,20 +651,10 @@
+/* +/*
+ * SPI Flash Interface Registers + * SPI Flash Interface Registers
+ */ + */
+#define AR531XPLUS_SPI_READ 0x08000000
+#define AR531XPLUS_SPI_MMR 0x11300000
+#define AR531XPLUS_SPI_MMR_SIZE 12
+ +
+#define AR531XPLUS_SPI_CTL 0x00 +#define SPI_FLASH_CTL 0x00
+#define AR531XPLUS_SPI_OPCODE 0x04 +#define SPI_FLASH_OPCODE 0x04
+#define AR531XPLUS_SPI_DATA 0x08 +#define SPI_FLASH_DATA 0x08
+
+#define SPI_FLASH_READ AR531XPLUS_SPI_READ
+#define SPI_FLASH_MMR AR531XPLUS_SPI_MMR
+#define SPI_FLASH_MMR_SIZE AR531XPLUS_SPI_MMR_SIZE
+#define SPI_FLASH_CTL AR531XPLUS_SPI_CTL
+#define SPI_FLASH_OPCODE AR531XPLUS_SPI_OPCODE
+#define SPI_FLASH_DATA AR531XPLUS_SPI_DATA
+ +
+#define SPI_CTL_START 0x00000100 +#define SPI_CTL_START 0x00000100
+#define SPI_CTL_BUSY 0x00010000 +#define SPI_CTL_BUSY 0x00010000