upgrade to 2.6.32.8
SVN-Revision: 19694
This commit is contained in:
		| @@ -1,5 +1,5 @@ | |||||||
| # | # | ||||||
| # Copyright (C) 2006-2009 OpenWrt.org | # Copyright (C) 2006-2010 OpenWrt.org | ||||||
| # | # | ||||||
| # This is free software, licensed under the GNU General Public License v2. | # This is free software, licensed under the GNU General Public License v2. | ||||||
| # See /LICENSE for more information. | # See /LICENSE for more information. | ||||||
| @@ -12,7 +12,7 @@ BOARDNAME:=Broadcom/SiByte SB-1 | |||||||
| FEATURES:=fpu | FEATURES:=fpu | ||||||
| CFLAGS:=-Os -pipe -march=sb1 -funit-at-a-time | CFLAGS:=-Os -pipe -march=sb1 -funit-at-a-time | ||||||
|  |  | ||||||
| LINUX_VERSION:=2.6.30.10 | LINUX_VERSION:=2.6.32.8 | ||||||
|  |  | ||||||
| include $(INCLUDE_DIR)/target.mk | include $(INCLUDE_DIR)/target.mk | ||||||
|  |  | ||||||
|   | |||||||
| @@ -1,5 +1,6 @@ | |||||||
| # CONFIG_32BIT is not set | # CONFIG_32BIT is not set | ||||||
| CONFIG_64BIT=y | CONFIG_64BIT=y | ||||||
|  | # CONFIG_AR7 is not set | ||||||
| # CONFIG_ARCH_HAS_ILOG2_U32 is not set | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||||||
| # CONFIG_ARCH_HAS_ILOG2_U64 is not set | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||||||
| CONFIG_ARCH_POPULATES_NODE_MAP=y | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||||||
| @@ -8,6 +9,7 @@ CONFIG_ARCH_SUPPORTS_OPROFILE=y | |||||||
| CONFIG_ARCH_SUSPEND_POSSIBLE=y | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||||||
| # CONFIG_ARPD is not set | # CONFIG_ARPD is not set | ||||||
| # CONFIG_BCM47XX is not set | # CONFIG_BCM47XX is not set | ||||||
|  | # CONFIG_BCM63XX is not set | ||||||
| # CONFIG_BINARY_PRINTF is not set | # CONFIG_BINARY_PRINTF is not set | ||||||
| CONFIG_BINFMT_ELF32=y | CONFIG_BINFMT_ELF32=y | ||||||
| CONFIG_BITREVERSE=y | CONFIG_BITREVERSE=y | ||||||
| @@ -107,6 +109,7 @@ CONFIG_LOG_BUF_SHIFT=15 | |||||||
| # CONFIG_MACH_ALCHEMY is not set | # CONFIG_MACH_ALCHEMY is not set | ||||||
| # CONFIG_MACH_DECSTATION is not set | # CONFIG_MACH_DECSTATION is not set | ||||||
| # CONFIG_MACH_JAZZ is not set | # CONFIG_MACH_JAZZ is not set | ||||||
|  | # CONFIG_MACH_LOONGSON is not set | ||||||
| # CONFIG_MACH_TX39XX is not set | # CONFIG_MACH_TX39XX is not set | ||||||
| # CONFIG_MACH_TX49XX is not set | # CONFIG_MACH_TX49XX is not set | ||||||
| # CONFIG_MACH_VR41XX is not set | # CONFIG_MACH_VR41XX is not set | ||||||
|   | |||||||
| @@ -1,37 +0,0 @@ | |||||||
| [PATCH] Remove SiByte simulator option |  | ||||||
|  |  | ||||||
| This patch removes the SiByte simulation Kconfig option, which only |  | ||||||
| modified a printk. |  | ||||||
|  |  | ||||||
| Signed-off-by: Imre Kaloz <kaloz@openwrt.org> |  | ||||||
|  |  | ||||||
| --- a/arch/mips/sibyte/Kconfig |  | ||||||
| +++ b/arch/mips/sibyte/Kconfig |  | ||||||
| @@ -128,13 +128,6 @@ config SIBYTE_ENABLE_LDT_IF_PCI |  | ||||||
|  	bool |  | ||||||
|  	select SIBYTE_HAS_LDT if PCI |  | ||||||
|   |  | ||||||
| -config SIMULATION |  | ||||||
| -	bool "Running under simulation" |  | ||||||
| -	depends on SIBYTE_SB1xxx_SOC |  | ||||||
| -	help |  | ||||||
| -	  Build a kernel suitable for running under the GDB simulator. |  | ||||||
| -	  Primarily adjusts the kernel's notion of time. |  | ||||||
| - |  | ||||||
|  config SB1_CEX_ALWAYS_FATAL |  | ||||||
|  	bool "All cache exceptions considered fatal (no recovery attempted)" |  | ||||||
|  	depends on SIBYTE_SB1xxx_SOC |  | ||||||
| --- a/arch/mips/sibyte/swarm/setup.c |  | ||||||
| +++ b/arch/mips/sibyte/swarm/setup.c |  | ||||||
| @@ -137,11 +137,7 @@ void __init plat_mem_setup(void) |  | ||||||
|  		swarm_rtc_type = RTC_M4LT81; |  | ||||||
|   |  | ||||||
|  	printk("This kernel optimized for " |  | ||||||
| -#ifdef CONFIG_SIMULATION |  | ||||||
| -	       "simulation" |  | ||||||
| -#else |  | ||||||
|  	       "board" |  | ||||||
| -#endif |  | ||||||
|  	       " runs " |  | ||||||
|  #ifdef CONFIG_SIBYTE_CFE |  | ||||||
|  	       "with" |  | ||||||
										
											
												File diff suppressed because it is too large
												Load Diff
											
										
									
								
							| @@ -1,19 +0,0 @@ | |||||||
| The SiByte platform code doesn't honor the CONFIG_CMDLINE kernel |  | ||||||
| option. This patch fixes this issue. |  | ||||||
|  |  | ||||||
| Signed-off-by: Imre Kaloz <kaloz@openwrt.org> |  | ||||||
|  |  | ||||||
| --- a/arch/mips/sibyte/common/cfe.c |  | ||||||
| +++ b/arch/mips/sibyte/common/cfe.c |  | ||||||
| @@ -293,7 +293,11 @@ void __init prom_init(void) |  | ||||||
|  			 * It's OK for direct boot to not provide a |  | ||||||
|  			 *  command line |  | ||||||
|  			 */ |  | ||||||
| +#ifdef CONFIG_CMDLINE |  | ||||||
| +			strlcpy(arcs_cmdline, CONFIG_CMDLINE, COMMAND_LINE_SIZE); |  | ||||||
| +#else |  | ||||||
|  			strcpy(arcs_cmdline, "root=/dev/ram0 "); |  | ||||||
| +#endif |  | ||||||
|  		} else { |  | ||||||
|  			/* The loader should have set the command line */ |  | ||||||
|  			/* too early for panic to do any good */ |  | ||||||
| @@ -1,49 +0,0 @@ | |||||||
| --- a/drivers/net/sb1250-mac.c |  | ||||||
| +++ b/drivers/net/sb1250-mac.c |  | ||||||
| @@ -2271,6 +2271,22 @@ static int sb1250_change_mtu(struct net_ |  | ||||||
|  	return 0; |  | ||||||
|  } |  | ||||||
|   |  | ||||||
| +static const struct net_device_ops sbmac_netdev_ops = { |  | ||||||
| +	.ndo_open		= sbmac_open, |  | ||||||
| +	.ndo_stop		= sbmac_close, |  | ||||||
| +	.ndo_start_xmit		= sbmac_start_tx, |  | ||||||
| +	.ndo_tx_timeout		= sbmac_tx_timeout, |  | ||||||
| +	.ndo_do_ioctl		= sbmac_mii_ioctl, |  | ||||||
| +	.ndo_set_multicast_list	= sbmac_set_rx_mode, |  | ||||||
| +	.ndo_change_mtu		= sb1250_change_mtu, |  | ||||||
| +	.ndo_validate_addr	= eth_validate_addr, |  | ||||||
| +	.ndo_set_mac_address	= eth_mac_addr, |  | ||||||
| + |  | ||||||
| +#ifdef CONFIG_NET_POLL_CONTROLLER |  | ||||||
| +	.ndo_poll_controller	= sbmac_netpoll, |  | ||||||
| +#endif |  | ||||||
| +}; |  | ||||||
| + |  | ||||||
|  /********************************************************************** |  | ||||||
|   *  SBMAC_INIT(dev) |  | ||||||
|   * |  | ||||||
| @@ -2327,21 +2343,12 @@ static int sbmac_init(struct platform_de |  | ||||||
|   |  | ||||||
|  	spin_lock_init(&(sc->sbm_lock)); |  | ||||||
|   |  | ||||||
| -	dev->open               = sbmac_open; |  | ||||||
| -	dev->hard_start_xmit    = sbmac_start_tx; |  | ||||||
| -	dev->stop               = sbmac_close; |  | ||||||
| -	dev->set_multicast_list = sbmac_set_rx_mode; |  | ||||||
| -	dev->do_ioctl           = sbmac_mii_ioctl; |  | ||||||
| -	dev->tx_timeout         = sbmac_tx_timeout; |  | ||||||
| +	dev->netdev_ops = &sbmac_netdev_ops; |  | ||||||
| + |  | ||||||
|  	dev->watchdog_timeo     = TX_TIMEOUT; |  | ||||||
|   |  | ||||||
|  	netif_napi_add(dev, &sc->napi, sbmac_poll, 16); |  | ||||||
|   |  | ||||||
| -	dev->change_mtu         = sb1250_change_mtu; |  | ||||||
| -#ifdef CONFIG_NET_POLL_CONTROLLER |  | ||||||
| -	dev->poll_controller = sbmac_netpoll; |  | ||||||
| -#endif |  | ||||||
| - |  | ||||||
|  	dev->irq		= UNIT_INT(idx); |  | ||||||
|   |  | ||||||
|  	/* This is needed for PASS2 for Rx H/W checksum feature */ |  | ||||||
| @@ -1,460 +1,3 @@ | |||||||
| --- a/arch/mips/sibyte/swarm/Makefile |  | ||||||
| +++ b/arch/mips/sibyte/swarm/Makefile |  | ||||||
| @@ -1,4 +1,3 @@ |  | ||||||
| -obj-y				:= platform.o setup.o rtc_xicor1241.o \ |  | ||||||
| -				   rtc_m41t81.o |  | ||||||
| +obj-y				:= platform.o setup.o |  | ||||||
|   |  | ||||||
|  obj-$(CONFIG_I2C_BOARDINFO)	+= swarm-i2c.o |  | ||||||
| --- a/arch/mips/sibyte/swarm/rtc_m41t81.c |  | ||||||
| +++ /dev/null |  | ||||||
| @@ -1,233 +0,0 @@ |  | ||||||
| -/* |  | ||||||
| - * Copyright (C) 2000, 2001 Broadcom Corporation |  | ||||||
| - * |  | ||||||
| - * Copyright (C) 2002 MontaVista Software Inc. |  | ||||||
| - * Author: jsun@mvista.com or jsun@junsun.net |  | ||||||
| - * |  | ||||||
| - * This program is free software; you can redistribute	it and/or modify it |  | ||||||
| - * under  the terms of	the GNU General	 Public License as published by the |  | ||||||
| - * Free Software Foundation;  either version 2 of the  License, or (at your |  | ||||||
| - * option) any later version. |  | ||||||
| - * |  | ||||||
| - */ |  | ||||||
| -#include <linux/bcd.h> |  | ||||||
| -#include <linux/types.h> |  | ||||||
| -#include <linux/time.h> |  | ||||||
| - |  | ||||||
| -#include <asm/time.h> |  | ||||||
| -#include <asm/addrspace.h> |  | ||||||
| -#include <asm/io.h> |  | ||||||
| - |  | ||||||
| -#include <asm/sibyte/sb1250.h> |  | ||||||
| -#include <asm/sibyte/sb1250_regs.h> |  | ||||||
| -#include <asm/sibyte/sb1250_smbus.h> |  | ||||||
| - |  | ||||||
| - |  | ||||||
| -/* M41T81 definitions */ |  | ||||||
| - |  | ||||||
| -/* |  | ||||||
| - * Register bits |  | ||||||
| - */ |  | ||||||
| - |  | ||||||
| -#define M41T81REG_SC_ST		0x80		/* stop bit */ |  | ||||||
| -#define M41T81REG_HR_CB		0x40		/* century bit */ |  | ||||||
| -#define M41T81REG_HR_CEB	0x80		/* century enable bit */ |  | ||||||
| -#define M41T81REG_CTL_S		0x20		/* sign bit */ |  | ||||||
| -#define M41T81REG_CTL_FT	0x40		/* frequency test bit */ |  | ||||||
| -#define M41T81REG_CTL_OUT	0x80		/* output level */ |  | ||||||
| -#define M41T81REG_WD_RB0	0x01		/* watchdog resolution bit 0 */ |  | ||||||
| -#define M41T81REG_WD_RB1	0x02		/* watchdog resolution bit 1 */ |  | ||||||
| -#define M41T81REG_WD_BMB0	0x04		/* watchdog multiplier bit 0 */ |  | ||||||
| -#define M41T81REG_WD_BMB1	0x08		/* watchdog multiplier bit 1 */ |  | ||||||
| -#define M41T81REG_WD_BMB2	0x10		/* watchdog multiplier bit 2 */ |  | ||||||
| -#define M41T81REG_WD_BMB3	0x20		/* watchdog multiplier bit 3 */ |  | ||||||
| -#define M41T81REG_WD_BMB4	0x40		/* watchdog multiplier bit 4 */ |  | ||||||
| -#define M41T81REG_AMO_ABE	0x20		/* alarm in "battery back-up mode" enable bit */ |  | ||||||
| -#define M41T81REG_AMO_SQWE	0x40		/* square wave enable */ |  | ||||||
| -#define M41T81REG_AMO_AFE	0x80		/* alarm flag enable flag */ |  | ||||||
| -#define M41T81REG_ADT_RPT5	0x40		/* alarm repeat mode bit 5 */ |  | ||||||
| -#define M41T81REG_ADT_RPT4	0x80		/* alarm repeat mode bit 4 */ |  | ||||||
| -#define M41T81REG_AHR_RPT3	0x80		/* alarm repeat mode bit 3 */ |  | ||||||
| -#define M41T81REG_AHR_HT	0x40		/* halt update bit */ |  | ||||||
| -#define M41T81REG_AMN_RPT2	0x80		/* alarm repeat mode bit 2 */ |  | ||||||
| -#define M41T81REG_ASC_RPT1	0x80		/* alarm repeat mode bit 1 */ |  | ||||||
| -#define M41T81REG_FLG_AF	0x40		/* alarm flag (read only) */ |  | ||||||
| -#define M41T81REG_FLG_WDF	0x80		/* watchdog flag (read only) */ |  | ||||||
| -#define M41T81REG_SQW_RS0	0x10		/* sqw frequency bit 0 */ |  | ||||||
| -#define M41T81REG_SQW_RS1	0x20		/* sqw frequency bit 1 */ |  | ||||||
| -#define M41T81REG_SQW_RS2	0x40		/* sqw frequency bit 2 */ |  | ||||||
| -#define M41T81REG_SQW_RS3	0x80		/* sqw frequency bit 3 */ |  | ||||||
| - |  | ||||||
| - |  | ||||||
| -/* |  | ||||||
| - * Register numbers |  | ||||||
| - */ |  | ||||||
| - |  | ||||||
| -#define M41T81REG_TSC	0x00		/* tenths/hundredths of second */ |  | ||||||
| -#define M41T81REG_SC	0x01		/* seconds */ |  | ||||||
| -#define M41T81REG_MN	0x02		/* minute */ |  | ||||||
| -#define M41T81REG_HR	0x03		/* hour/century */ |  | ||||||
| -#define M41T81REG_DY	0x04		/* day of week */ |  | ||||||
| -#define M41T81REG_DT	0x05		/* date of month */ |  | ||||||
| -#define M41T81REG_MO	0x06		/* month */ |  | ||||||
| -#define M41T81REG_YR	0x07		/* year */ |  | ||||||
| -#define M41T81REG_CTL	0x08		/* control */ |  | ||||||
| -#define M41T81REG_WD	0x09		/* watchdog */ |  | ||||||
| -#define M41T81REG_AMO	0x0A		/* alarm: month */ |  | ||||||
| -#define M41T81REG_ADT	0x0B		/* alarm: date */ |  | ||||||
| -#define M41T81REG_AHR	0x0C		/* alarm: hour */ |  | ||||||
| -#define M41T81REG_AMN	0x0D		/* alarm: minute */ |  | ||||||
| -#define M41T81REG_ASC	0x0E		/* alarm: second */ |  | ||||||
| -#define M41T81REG_FLG	0x0F		/* flags */ |  | ||||||
| -#define M41T81REG_SQW	0x13		/* square wave register */ |  | ||||||
| - |  | ||||||
| -#define M41T81_CCR_ADDRESS	0x68 |  | ||||||
| - |  | ||||||
| -#define SMB_CSR(reg)	IOADDR(A_SMB_REGISTER(1, reg)) |  | ||||||
| - |  | ||||||
| -static int m41t81_read(uint8_t addr) |  | ||||||
| -{ |  | ||||||
| -	while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -		; |  | ||||||
| - |  | ||||||
| -	__raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR1BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -	while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -		; |  | ||||||
| - |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -	while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -		; |  | ||||||
| - |  | ||||||
| -	if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { |  | ||||||
| -		/* Clear error bit by writing a 1 */ |  | ||||||
| -		__raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); |  | ||||||
| -		return -1; |  | ||||||
| -	} |  | ||||||
| - |  | ||||||
| -	return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff); |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -static int m41t81_write(uint8_t addr, int b) |  | ||||||
| -{ |  | ||||||
| -	while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -		; |  | ||||||
| - |  | ||||||
| -	__raw_writeq(addr & 0xff, SMB_CSR(R_SMB_CMD)); |  | ||||||
| -	__raw_writeq(b & 0xff, SMB_CSR(R_SMB_DATA)); |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -	while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -		; |  | ||||||
| - |  | ||||||
| -	if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { |  | ||||||
| -		/* Clear error bit by writing a 1 */ |  | ||||||
| -		__raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); |  | ||||||
| -		return -1; |  | ||||||
| -	} |  | ||||||
| - |  | ||||||
| -	/* read the same byte again to make sure it is written */ |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(M41T81_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -	while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -		; |  | ||||||
| - |  | ||||||
| -	return 0; |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -int m41t81_set_time(unsigned long t) |  | ||||||
| -{ |  | ||||||
| -	struct rtc_time tm; |  | ||||||
| -	unsigned long flags; |  | ||||||
| - |  | ||||||
| -	/* Note we don't care about the century */ |  | ||||||
| -	rtc_time_to_tm(t, &tm); |  | ||||||
| - |  | ||||||
| -	/* |  | ||||||
| -	 * Note the write order matters as it ensures the correctness. |  | ||||||
| -	 * When we write sec, 10th sec is clear.  It is reasonable to |  | ||||||
| -	 * believe we should finish writing min within a second. |  | ||||||
| -	 */ |  | ||||||
| - |  | ||||||
| -	spin_lock_irqsave(&rtc_lock, flags); |  | ||||||
| -	tm.tm_sec = bin2bcd(tm.tm_sec); |  | ||||||
| -	m41t81_write(M41T81REG_SC, tm.tm_sec); |  | ||||||
| - |  | ||||||
| -	tm.tm_min = bin2bcd(tm.tm_min); |  | ||||||
| -	m41t81_write(M41T81REG_MN, tm.tm_min); |  | ||||||
| - |  | ||||||
| -	tm.tm_hour = bin2bcd(tm.tm_hour); |  | ||||||
| -	tm.tm_hour = (tm.tm_hour & 0x3f) | (m41t81_read(M41T81REG_HR) & 0xc0); |  | ||||||
| -	m41t81_write(M41T81REG_HR, tm.tm_hour); |  | ||||||
| - |  | ||||||
| -	/* tm_wday starts from 0 to 6 */ |  | ||||||
| -	if (tm.tm_wday == 0) tm.tm_wday = 7; |  | ||||||
| -	tm.tm_wday = bin2bcd(tm.tm_wday); |  | ||||||
| -	m41t81_write(M41T81REG_DY, tm.tm_wday); |  | ||||||
| - |  | ||||||
| -	tm.tm_mday = bin2bcd(tm.tm_mday); |  | ||||||
| -	m41t81_write(M41T81REG_DT, tm.tm_mday); |  | ||||||
| - |  | ||||||
| -	/* tm_mon starts from 0, *ick* */ |  | ||||||
| -	tm.tm_mon ++; |  | ||||||
| -	tm.tm_mon = bin2bcd(tm.tm_mon); |  | ||||||
| -	m41t81_write(M41T81REG_MO, tm.tm_mon); |  | ||||||
| - |  | ||||||
| -	/* we don't do century, everything is beyond 2000 */ |  | ||||||
| -	tm.tm_year %= 100; |  | ||||||
| -	tm.tm_year = bin2bcd(tm.tm_year); |  | ||||||
| -	m41t81_write(M41T81REG_YR, tm.tm_year); |  | ||||||
| -	spin_unlock_irqrestore(&rtc_lock, flags); |  | ||||||
| - |  | ||||||
| -	return 0; |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -unsigned long m41t81_get_time(void) |  | ||||||
| -{ |  | ||||||
| -	unsigned int year, mon, day, hour, min, sec; |  | ||||||
| -	unsigned long flags; |  | ||||||
| - |  | ||||||
| -	/* |  | ||||||
| -	 * min is valid if two reads of sec are the same. |  | ||||||
| -	 */ |  | ||||||
| -	for (;;) { |  | ||||||
| -		spin_lock_irqsave(&rtc_lock, flags); |  | ||||||
| -		sec = m41t81_read(M41T81REG_SC); |  | ||||||
| -		min = m41t81_read(M41T81REG_MN); |  | ||||||
| -		if (sec == m41t81_read(M41T81REG_SC)) break; |  | ||||||
| -		spin_unlock_irqrestore(&rtc_lock, flags); |  | ||||||
| -	} |  | ||||||
| -	hour = m41t81_read(M41T81REG_HR) & 0x3f; |  | ||||||
| -	day = m41t81_read(M41T81REG_DT); |  | ||||||
| -	mon = m41t81_read(M41T81REG_MO); |  | ||||||
| -	year = m41t81_read(M41T81REG_YR); |  | ||||||
| -	spin_unlock_irqrestore(&rtc_lock, flags); |  | ||||||
| - |  | ||||||
| -	sec = bcd2bin(sec); |  | ||||||
| -	min = bcd2bin(min); |  | ||||||
| -	hour = bcd2bin(hour); |  | ||||||
| -	day = bcd2bin(day); |  | ||||||
| -	mon = bcd2bin(mon); |  | ||||||
| -	year = bcd2bin(year); |  | ||||||
| - |  | ||||||
| -	year += 2000; |  | ||||||
| - |  | ||||||
| -	return mktime(year, mon, day, hour, min, sec); |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -int m41t81_probe(void) |  | ||||||
| -{ |  | ||||||
| -	unsigned int tmp; |  | ||||||
| - |  | ||||||
| -	/* enable chip if it is not enabled yet */ |  | ||||||
| -	tmp = m41t81_read(M41T81REG_SC); |  | ||||||
| -	m41t81_write(M41T81REG_SC, tmp & 0x7f); |  | ||||||
| - |  | ||||||
| -	return (m41t81_read(M41T81REG_SC) != -1); |  | ||||||
| -} |  | ||||||
| --- a/arch/mips/sibyte/swarm/rtc_xicor1241.c |  | ||||||
| +++ /dev/null |  | ||||||
| @@ -1,210 +0,0 @@ |  | ||||||
| -/* |  | ||||||
| - * Copyright (C) 2000, 2001 Broadcom Corporation |  | ||||||
| - * |  | ||||||
| - * Copyright (C) 2002 MontaVista Software Inc. |  | ||||||
| - * Author: jsun@mvista.com or jsun@junsun.net |  | ||||||
| - * |  | ||||||
| - * This program is free software; you can redistribute  it and/or modify it |  | ||||||
| - * under  the terms of  the GNU General  Public License as published by the |  | ||||||
| - * Free Software Foundation;  either version 2 of the  License, or (at your |  | ||||||
| - * option) any later version. |  | ||||||
| - */ |  | ||||||
| -#include <linux/bcd.h> |  | ||||||
| -#include <linux/types.h> |  | ||||||
| -#include <linux/time.h> |  | ||||||
| - |  | ||||||
| -#include <asm/time.h> |  | ||||||
| -#include <asm/addrspace.h> |  | ||||||
| -#include <asm/io.h> |  | ||||||
| - |  | ||||||
| -#include <asm/sibyte/sb1250.h> |  | ||||||
| -#include <asm/sibyte/sb1250_regs.h> |  | ||||||
| -#include <asm/sibyte/sb1250_smbus.h> |  | ||||||
| - |  | ||||||
| - |  | ||||||
| -/* Xicor 1241 definitions */ |  | ||||||
| - |  | ||||||
| -/* |  | ||||||
| - * Register bits |  | ||||||
| - */ |  | ||||||
| - |  | ||||||
| -#define X1241REG_SR_BAT	0x80		/* currently on battery power */ |  | ||||||
| -#define X1241REG_SR_RWEL 0x04		/* r/w latch is enabled, can write RTC */ |  | ||||||
| -#define X1241REG_SR_WEL 0x02		/* r/w latch is unlocked, can enable r/w now */ |  | ||||||
| -#define X1241REG_SR_RTCF 0x01		/* clock failed */ |  | ||||||
| -#define X1241REG_BL_BP2 0x80		/* block protect 2 */ |  | ||||||
| -#define X1241REG_BL_BP1 0x40		/* block protect 1 */ |  | ||||||
| -#define X1241REG_BL_BP0 0x20		/* block protect 0 */ |  | ||||||
| -#define X1241REG_BL_WD1	0x10 |  | ||||||
| -#define X1241REG_BL_WD0	0x08 |  | ||||||
| -#define X1241REG_HR_MIL 0x80		/* military time format */ |  | ||||||
| - |  | ||||||
| -/* |  | ||||||
| - * Register numbers |  | ||||||
| - */ |  | ||||||
| - |  | ||||||
| -#define X1241REG_BL	0x10		/* block protect bits */ |  | ||||||
| -#define X1241REG_INT	0x11		/*  */ |  | ||||||
| -#define X1241REG_SC	0x30		/* Seconds */ |  | ||||||
| -#define X1241REG_MN	0x31		/* Minutes */ |  | ||||||
| -#define X1241REG_HR	0x32		/* Hours */ |  | ||||||
| -#define X1241REG_DT	0x33		/* Day of month */ |  | ||||||
| -#define X1241REG_MO	0x34		/* Month */ |  | ||||||
| -#define X1241REG_YR	0x35		/* Year */ |  | ||||||
| -#define X1241REG_DW	0x36		/* Day of Week */ |  | ||||||
| -#define X1241REG_Y2K	0x37		/* Year 2K */ |  | ||||||
| -#define X1241REG_SR	0x3F		/* Status register */ |  | ||||||
| - |  | ||||||
| -#define X1241_CCR_ADDRESS	0x6F |  | ||||||
| - |  | ||||||
| -#define SMB_CSR(reg)	IOADDR(A_SMB_REGISTER(1, reg)) |  | ||||||
| - |  | ||||||
| -static int xicor_read(uint8_t addr) |  | ||||||
| -{ |  | ||||||
| -        while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -                ; |  | ||||||
| - |  | ||||||
| -	__raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD)); |  | ||||||
| -	__raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA)); |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -        while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -                ; |  | ||||||
| - |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -        while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -                ; |  | ||||||
| - |  | ||||||
| -        if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { |  | ||||||
| -                /* Clear error bit by writing a 1 */ |  | ||||||
| -                __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); |  | ||||||
| -                return -1; |  | ||||||
| -        } |  | ||||||
| - |  | ||||||
| -	return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff); |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -static int xicor_write(uint8_t addr, int b) |  | ||||||
| -{ |  | ||||||
| -        while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -                ; |  | ||||||
| - |  | ||||||
| -	__raw_writeq(addr, SMB_CSR(R_SMB_CMD)); |  | ||||||
| -	__raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA)); |  | ||||||
| -	__raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE, |  | ||||||
| -		     SMB_CSR(R_SMB_START)); |  | ||||||
| - |  | ||||||
| -        while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY) |  | ||||||
| -                ; |  | ||||||
| - |  | ||||||
| -        if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) { |  | ||||||
| -                /* Clear error bit by writing a 1 */ |  | ||||||
| -                __raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS)); |  | ||||||
| -                return -1; |  | ||||||
| -        } else { |  | ||||||
| -		return 0; |  | ||||||
| -	} |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -int xicor_set_time(unsigned long t) |  | ||||||
| -{ |  | ||||||
| -	struct rtc_time tm; |  | ||||||
| -	int tmp; |  | ||||||
| -	unsigned long flags; |  | ||||||
| - |  | ||||||
| -	rtc_time_to_tm(t, &tm); |  | ||||||
| -	tm.tm_year += 1900; |  | ||||||
| - |  | ||||||
| -	spin_lock_irqsave(&rtc_lock, flags); |  | ||||||
| -	/* unlock writes to the CCR */ |  | ||||||
| -	xicor_write(X1241REG_SR, X1241REG_SR_WEL); |  | ||||||
| -	xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL); |  | ||||||
| - |  | ||||||
| -	/* trivial ones */ |  | ||||||
| -	tm.tm_sec = bin2bcd(tm.tm_sec); |  | ||||||
| -	xicor_write(X1241REG_SC, tm.tm_sec); |  | ||||||
| - |  | ||||||
| -	tm.tm_min = bin2bcd(tm.tm_min); |  | ||||||
| -	xicor_write(X1241REG_MN, tm.tm_min); |  | ||||||
| - |  | ||||||
| -	tm.tm_mday = bin2bcd(tm.tm_mday); |  | ||||||
| -	xicor_write(X1241REG_DT, tm.tm_mday); |  | ||||||
| - |  | ||||||
| -	/* tm_mon starts from 0, *ick* */ |  | ||||||
| -	tm.tm_mon ++; |  | ||||||
| -	tm.tm_mon = bin2bcd(tm.tm_mon); |  | ||||||
| -	xicor_write(X1241REG_MO, tm.tm_mon); |  | ||||||
| - |  | ||||||
| -	/* year is split */ |  | ||||||
| -	tmp = tm.tm_year / 100; |  | ||||||
| -	tm.tm_year %= 100; |  | ||||||
| -	xicor_write(X1241REG_YR, tm.tm_year); |  | ||||||
| -	xicor_write(X1241REG_Y2K, tmp); |  | ||||||
| - |  | ||||||
| -	/* hour is the most tricky one */ |  | ||||||
| -	tmp = xicor_read(X1241REG_HR); |  | ||||||
| -	if (tmp & X1241REG_HR_MIL) { |  | ||||||
| -		/* 24 hour format */ |  | ||||||
| -		tm.tm_hour = bin2bcd(tm.tm_hour); |  | ||||||
| -		tmp = (tmp & ~0x3f) | (tm.tm_hour & 0x3f); |  | ||||||
| -	} else { |  | ||||||
| -		/* 12 hour format, with 0x2 for pm */ |  | ||||||
| -		tmp = tmp & ~0x3f; |  | ||||||
| -		if (tm.tm_hour >= 12) { |  | ||||||
| -			tmp |= 0x20; |  | ||||||
| -			tm.tm_hour -= 12; |  | ||||||
| -		} |  | ||||||
| -		tm.tm_hour = bin2bcd(tm.tm_hour); |  | ||||||
| -		tmp |= tm.tm_hour; |  | ||||||
| -	} |  | ||||||
| -	xicor_write(X1241REG_HR, tmp); |  | ||||||
| - |  | ||||||
| -	xicor_write(X1241REG_SR, 0); |  | ||||||
| -	spin_unlock_irqrestore(&rtc_lock, flags); |  | ||||||
| - |  | ||||||
| -	return 0; |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -unsigned long xicor_get_time(void) |  | ||||||
| -{ |  | ||||||
| -	unsigned int year, mon, day, hour, min, sec, y2k; |  | ||||||
| -	unsigned long flags; |  | ||||||
| - |  | ||||||
| -	spin_lock_irqsave(&rtc_lock, flags); |  | ||||||
| -	sec = xicor_read(X1241REG_SC); |  | ||||||
| -	min = xicor_read(X1241REG_MN); |  | ||||||
| -	hour = xicor_read(X1241REG_HR); |  | ||||||
| - |  | ||||||
| -	if (hour & X1241REG_HR_MIL) { |  | ||||||
| -		hour &= 0x3f; |  | ||||||
| -	} else { |  | ||||||
| -		if (hour & 0x20) |  | ||||||
| -			hour = (hour & 0xf) + 0x12; |  | ||||||
| -	} |  | ||||||
| - |  | ||||||
| -	day = xicor_read(X1241REG_DT); |  | ||||||
| -	mon = xicor_read(X1241REG_MO); |  | ||||||
| -	year = xicor_read(X1241REG_YR); |  | ||||||
| -	y2k = xicor_read(X1241REG_Y2K); |  | ||||||
| -	spin_unlock_irqrestore(&rtc_lock, flags); |  | ||||||
| - |  | ||||||
| -	sec = bcd2bin(sec); |  | ||||||
| -	min = bcd2bin(min); |  | ||||||
| -	hour = bcd2bin(hour); |  | ||||||
| -	day = bcd2bin(day); |  | ||||||
| -	mon = bcd2bin(mon); |  | ||||||
| -	year = bcd2bin(year); |  | ||||||
| -	y2k = bcd2bin(y2k); |  | ||||||
| - |  | ||||||
| -	year += (y2k * 100); |  | ||||||
| - |  | ||||||
| -	return mktime(year, mon, day, hour, min, sec); |  | ||||||
| -} |  | ||||||
| - |  | ||||||
| -int xicor_probe(void) |  | ||||||
| -{ |  | ||||||
| -	return (xicor_read(X1241REG_SC) != -1); |  | ||||||
| -} |  | ||||||
| --- a/arch/mips/sibyte/swarm/setup.c | --- a/arch/mips/sibyte/swarm/setup.c | ||||||
| +++ b/arch/mips/sibyte/swarm/setup.c | +++ b/arch/mips/sibyte/swarm/setup.c | ||||||
| @@ -56,14 +56,6 @@ extern void sb1250_setup(void); | @@ -56,14 +56,6 @@ extern void sb1250_setup(void); | ||||||
| @@ -472,7 +15,7 @@ | |||||||
|  const char *get_system_type(void) |  const char *get_system_type(void) | ||||||
|  { |  { | ||||||
|  	return "SiByte " SIBYTE_BOARD_NAME; |  	return "SiByte " SIBYTE_BOARD_NAME; | ||||||
| @@ -79,42 +71,14 @@ int swarm_be_handler(struct pt_regs *reg | @@ -79,49 +71,18 @@ int swarm_be_handler(struct pt_regs *reg | ||||||
|  	return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); |  	return (is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL); | ||||||
|  } |  } | ||||||
|   |   | ||||||
| @@ -484,20 +27,27 @@ | |||||||
| - | - | ||||||
| -enum swarm_rtc_type swarm_rtc_type; | -enum swarm_rtc_type swarm_rtc_type; | ||||||
| - | - | ||||||
|  unsigned long read_persistent_clock(void) |  void read_persistent_clock(struct timespec *ts) | ||||||
|  { |  { | ||||||
|  |  	unsigned long sec; | ||||||
|  |   | ||||||
| -	switch (swarm_rtc_type) { | -	switch (swarm_rtc_type) { | ||||||
| -	case RTC_XICOR: | -	case RTC_XICOR: | ||||||
| -		return xicor_get_time(); | -		sec = xicor_get_time(); | ||||||
|  | -		break; | ||||||
| - | - | ||||||
| -	case RTC_M4LT81: | -	case RTC_M4LT81: | ||||||
| -		return m41t81_get_time(); | -		sec = m41t81_get_time(); | ||||||
|  | -		break; | ||||||
| - | - | ||||||
| -	case RTC_NONE: | -	case RTC_NONE: | ||||||
| -	default: | -	default: | ||||||
| -		return mktime(2000, 1, 1, 0, 0, 0); | -		sec = mktime(2000, 1, 1, 0, 0, 0); | ||||||
|  | -		break; | ||||||
| -	} | -	} | ||||||
| +	return mktime(2000, 1, 1, 0, 0, 0); | +	sec = mktime(2000, 1, 1, 0, 0, 0); | ||||||
|  |  	ts->tv_sec = sec; | ||||||
|  |  	ts->tv_nsec = 0; | ||||||
|  } |  } | ||||||
|   |   | ||||||
|  int rtc_mips_set_time(unsigned long sec) |  int rtc_mips_set_time(unsigned long sec) | ||||||
| @@ -511,13 +61,12 @@ | |||||||
| - | - | ||||||
| -	case RTC_NONE: | -	case RTC_NONE: | ||||||
| -	default: | -	default: | ||||||
| -		return -1; |  		return -1; | ||||||
| -	} | -	} | ||||||
| +	return -1; |  | ||||||
|  } |  } | ||||||
|   |   | ||||||
|  void __init plat_mem_setup(void) |  void __init plat_mem_setup(void) | ||||||
| @@ -131,11 +95,6 @@ void __init plat_mem_setup(void) | @@ -138,11 +99,6 @@ void __init plat_mem_setup(void) | ||||||
|   |   | ||||||
|  	board_be_handler = swarm_be_handler; |  	board_be_handler = swarm_be_handler; | ||||||
|   |   | ||||||
|   | |||||||
| @@ -1,6 +1,6 @@ | |||||||
| --- a/arch/mips/sibyte/swarm/swarm-i2c.c | --- a/arch/mips/sibyte/swarm/swarm-i2c.c | ||||||
| +++ b/arch/mips/sibyte/swarm/swarm-i2c.c | +++ b/arch/mips/sibyte/swarm/swarm-i2c.c | ||||||
| @@ -15,6 +15,11 @@ | @@ -13,6 +13,11 @@ | ||||||
|  #include <linux/init.h> |  #include <linux/init.h> | ||||||
|  #include <linux/kernel.h> |  #include <linux/kernel.h> | ||||||
|   |   | ||||||
| @@ -12,7 +12,7 @@ | |||||||
|   |   | ||||||
|  static struct i2c_board_info swarm_i2c_info1[] __initdata = { |  static struct i2c_board_info swarm_i2c_info1[] __initdata = { | ||||||
|  	{ |  	{ | ||||||
| @@ -26,6 +31,8 @@ static int __init swarm_i2c_init(void) | @@ -24,6 +29,8 @@ static int __init swarm_i2c_init(void) | ||||||
|  { |  { | ||||||
|  	int err; |  	int err; | ||||||
|   |   | ||||||
|   | |||||||
| @@ -1,7 +1,6 @@ | |||||||
| diff -urN linux-2.6.30.10/arch/mips/Makefile linux-2.6.30.10.new//arch/mips/Makefile | --- a/arch/mips/Makefile | ||||||
| --- linux-2.6.30.10/arch/mips/Makefile	2010-01-29 16:12:01.000000000 +0100 | +++ b/arch/mips/Makefile | ||||||
| +++ linux-2.6.30.10.new//arch/mips/Makefile	2009-12-04 07:00:07.000000000 +0100 | @@ -83,7 +83,7 @@ all-$(CONFIG_BOOT_ELF64)	:= $(vmlinux-64 | ||||||
| @@ -83,7 +83,7 @@ |  | ||||||
|  cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe |  cflags-y			+= -G 0 -mno-abicalls -fno-pic -pipe | ||||||
|  cflags-y			+= -msoft-float |  cflags-y			+= -msoft-float | ||||||
|  LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib |  LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib | ||||||
| @@ -10,10 +9,9 @@ diff -urN linux-2.6.30.10/arch/mips/Makefile linux-2.6.30.10.new//arch/mips/Make | |||||||
|   |   | ||||||
|  cflags-y += -ffreestanding |  cflags-y += -ffreestanding | ||||||
|   |   | ||||||
| diff -urN linux-2.6.30.10/arch/mips/include/asm/module.h linux-2.6.30.10.new//arch/mips/include/asm/module.h | --- a/arch/mips/include/asm/module.h | ||||||
| --- linux-2.6.30.10/arch/mips/include/asm/module.h	2010-01-29 16:12:01.000000000 +0100 | +++ b/arch/mips/include/asm/module.h | ||||||
| +++ linux-2.6.30.10.new//arch/mips/include/asm/module.h	2009-12-04 07:00:07.000000000 +0100 | @@ -9,11 +9,6 @@ struct mod_arch_specific { | ||||||
| @@ -9,11 +9,6 @@ |  | ||||||
|  	struct list_head dbe_list; |  	struct list_head dbe_list; | ||||||
|  	const struct exception_table_entry *dbe_start; |  	const struct exception_table_entry *dbe_start; | ||||||
|  	const struct exception_table_entry *dbe_end; |  	const struct exception_table_entry *dbe_end; | ||||||
| @@ -25,10 +23,9 @@ diff -urN linux-2.6.30.10/arch/mips/include/asm/module.h linux-2.6.30.10.new//ar | |||||||
|  }; |  }; | ||||||
|   |   | ||||||
|  typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity.  */ |  typedef uint8_t Elf64_Byte;		/* Type for a 8-bit quantity.  */ | ||||||
| diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mips/kernel/module.c | --- a/arch/mips/kernel/module.c | ||||||
| --- linux-2.6.30.10/arch/mips/kernel/module.c	2010-01-29 16:12:01.000000000 +0100 | +++ b/arch/mips/kernel/module.c | ||||||
| +++ linux-2.6.30.10.new//arch/mips/kernel/module.c	2009-12-04 07:00:07.000000000 +0100 | @@ -43,117 +43,6 @@ static struct mips_hi16 *mips_hi16_list; | ||||||
| @@ -43,116 +43,6 @@ |  | ||||||
|  static LIST_HEAD(dbe_list); |  static LIST_HEAD(dbe_list); | ||||||
|  static DEFINE_SPINLOCK(dbe_lock); |  static DEFINE_SPINLOCK(dbe_lock); | ||||||
|   |   | ||||||
| @@ -141,11 +138,12 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
| -	for (; page < end; ++page) | -	for (; page < end; ++page) | ||||||
| -		__free_page(page); | -		__free_page(page); | ||||||
| -} | -} | ||||||
|  | - | ||||||
| - | - | ||||||
|  void *module_alloc(unsigned long size) |  void *module_alloc(unsigned long size) | ||||||
|  { |  { | ||||||
|  #ifdef MODULE_START |  #ifdef MODULE_START | ||||||
| @@ -168,101 +58,23 @@ | @@ -169,99 +58,21 @@ void *module_alloc(unsigned long size) | ||||||
|   |   | ||||||
|  	return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); |  	return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); | ||||||
|  #else |  #else | ||||||
| @@ -189,11 +187,8 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
| -	} else { | -	} else { | ||||||
| -		vfree(module_region); | -		vfree(module_region); | ||||||
| -	} | -	} | ||||||
| +	vfree(module_region); | -} | ||||||
|  	/* FIXME: If module_region == mod->init_region, trim exception | - | ||||||
|             table entries. */ |  | ||||||
|  } |  | ||||||
|   |  | ||||||
| -static void *__module_alloc(int size, bool phys) | -static void *__module_alloc(int size, bool phys) | ||||||
| -{ | -{ | ||||||
| -	void *ptr; | -	void *ptr; | ||||||
| @@ -211,8 +206,9 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
| -		kfree(ptr); | -		kfree(ptr); | ||||||
| -	else | -	else | ||||||
| -		vfree(ptr); | -		vfree(ptr); | ||||||
| -} | +	vfree(module_region); | ||||||
| - |  } | ||||||
|  |   | ||||||
|  int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, |  int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, | ||||||
|  			      char *secstrings, struct module *mod) |  			      char *secstrings, struct module *mod) | ||||||
|  { |  { | ||||||
| @@ -249,7 +245,7 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
|  	return 0; |  	return 0; | ||||||
|  } |  } | ||||||
|   |   | ||||||
| @@ -285,37 +97,27 @@ | @@ -284,36 +95,28 @@ static int apply_r_mips_32_rela(struct m | ||||||
|  	return 0; |  	return 0; | ||||||
|  } |  } | ||||||
|   |   | ||||||
| @@ -258,7 +254,6 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
| +static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v) | +static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v) | ||||||
|  { |  { | ||||||
| -	unsigned *tramp = start + *plt_offset; | -	unsigned *tramp = start + *plt_offset; | ||||||
| - |  | ||||||
| -	*plt_offset += 4 * sizeof(int); | -	*plt_offset += 4 * sizeof(int); | ||||||
| - | - | ||||||
| -	/* adjust carry for addiu */ | -	/* adjust carry for addiu */ | ||||||
| @@ -270,7 +265,8 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
| -	tramp[2] = 0x03200008;                  /* jr t9 */ | -	tramp[2] = 0x03200008;                  /* jr t9 */ | ||||||
| -	tramp[3] = 0x00000000;                  /* nop */ | -	tramp[3] = 0x00000000;                  /* nop */ | ||||||
| +	if (v % 4) { | +	if (v % 4) { | ||||||
| +		printk(KERN_ERR "module %s: dangerous relocation\n", me->name); | +		pr_err("module %s: dangerous R_MIPS_26 REL relocation\n", | ||||||
|  | +		       me->name); | ||||||
| +		return -ENOEXEC; | +		return -ENOEXEC; | ||||||
| +	} | +	} | ||||||
|   |   | ||||||
| @@ -301,8 +297,8 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
| +static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v) | +static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v) | ||||||
|  { |  { | ||||||
|  	if (v % 4) { |  	if (v % 4) { | ||||||
|  		printk(KERN_ERR "module %s: dangerous relocation\n", me->name); |  		pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n", | ||||||
| @@ -323,31 +125,17 @@ | @@ -322,31 +125,17 @@ static int set_r_mips_26(struct module * | ||||||
|  	} |  	} | ||||||
|   |   | ||||||
|  	if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { |  	if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { | ||||||
| @@ -337,7 +333,7 @@ diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mi | |||||||
|  static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v) |  static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v) | ||||||
|  { |  { | ||||||
|  	struct mips_hi16 *n; |  	struct mips_hi16 *n; | ||||||
| @@ -612,32 +400,11 @@ | @@ -611,32 +400,11 @@ int module_finalize(const Elf_Ehdr *hdr, | ||||||
|  		list_add(&me->arch.dbe_list, &dbe_list); |  		list_add(&me->arch.dbe_list, &dbe_list); | ||||||
|  		spin_unlock_irq(&dbe_lock); |  		spin_unlock_irq(&dbe_lock); | ||||||
|  	} |  	} | ||||||
|   | |||||||
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