kernel: bump 5.10 to 5.10.98

Manually rebased:
	bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch

All other patches automatically rebased.

Build system: x86_64
Build-tested: bcm2711/RPi4B, mt7622/RT3200
Run-tested: bcm2711/RPi4B, mt7622/RT3200

Signed-off-by: John Audia <graysky@archlinux.us>
This commit is contained in:
John Audia
2022-02-06 11:51:17 -05:00
committed by Hauke Mehrtens
parent 337e942290
commit e9c1c83679
26 changed files with 68 additions and 92 deletions

View File

@@ -14,7 +14,7 @@ Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3269,6 +3269,7 @@ static const struct mtk_soc_data mt7623_
@@ -3302,6 +3302,7 @@ static const struct mtk_soc_data mt7623_
.hw_features = MTK_HW_FEATURES,
.required_clks = MT7623_CLKS_BITMAP,
.required_pctl = true,

View File

@@ -51,7 +51,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
ret = device_reset(eth->dev);
if (ret) {
@@ -3071,6 +3079,16 @@ static int mtk_probe(struct platform_dev
@@ -3104,6 +3112,16 @@ static int mtk_probe(struct platform_dev
}
}
@@ -70,7 +70,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
GFP_KERNEL);
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -450,6 +450,12 @@
@@ -456,6 +456,12 @@
#define RSTCTRL_FE BIT(6)
#define RSTCTRL_PPE BIT(31)

View File

@@ -103,7 +103,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static int mtk_mdio_write(struct mii_bus *bus, int phy_addr,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -340,11 +340,17 @@
@@ -341,11 +341,17 @@
/* PHY Indirect Access Control registers */
#define MTK_PHY_IAC 0x10004
#define PHY_IAC_ACCESS BIT(31)

View File

@@ -113,7 +113,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -345,9 +345,12 @@
@@ -346,9 +346,12 @@
#define PHY_IAC_ADDR_MASK GENMASK(24, 20)
#define PHY_IAC_ADDR(x) FIELD_PREP(PHY_IAC_ADDR_MASK, (x))
#define PHY_IAC_CMD_MASK GENMASK(19, 18)