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mpc85xx: drop 3.14 support

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Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 44818
This commit is contained in:
John Crispin
2015-03-16 07:40:47 +00:00
parent 518d9fd2a0
commit fe33c185bd
9 changed files with 0 additions and 1203 deletions
Download Patch File Download Diff File Expand all files Collapse all files

292
target/linux/mpc85xx/config-3.14
View File

@@ -1,292 +0,0 @@
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_ARCH_HAS_WALK_MEMORY=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_MSI=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_AUDIT_ARCH=y
CONFIG_BOOKE=y
CONFIG_BOUNCE=y
# CONFIG_BSC9131_RDB is not set
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CPM2 is not set
# CONFIG_CRYPTO_SHA1_PPC is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEFAULT_UIMAGE=y
CONFIG_DEVKMEM=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_E200 is not set
CONFIG_E500=y
CONFIG_EARLY_PRINTK=y
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_EPAPR_BOOT is not set
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FSL_BOOKE=y
CONFIG_FSL_EMB_PERFMON=y
CONFIG_FSL_LBC=y
CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
CONFIG_FSL_ULI1575=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_NVRAM=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GENERIC_TBSYNC is not set
CONFIG_GENERIC_TIME_VSYSCALL_OLD=y
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
# CONFIG_GE_FPGA is not set
# CONFIG_GE_IMP3A is not set
CONFIG_GIANFAR=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GPIO_SYSFS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_RAPIDIO=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_HARDIRQS=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IOMMU_HELPER=y
# CONFIG_IPIC is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KSI8560 is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LOWMEM_CAM_NUM=3
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
CONFIG_M25PXX_USE_FAST_READ=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BOARDINFO=y
CONFIG_MIGRATION=y
# CONFIG_MII is not set
# CONFIG_MMIO_NVRAM is not set
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPC8536_DS is not set
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
CONFIG_MPC85xx_CDS=y
# CONFIG_MPC85xx_DS is not set
CONFIG_MPC85xx_MDS=y
CONFIG_MPC85xx_RDB=y
CONFIG_MPIC=y
# CONFIG_MPIC_MSGR is not set
# CONFIG_MPIC_U3_HT_IRQS is not set
# CONFIG_MPIC_WEIRD is not set
# CONFIG_MTD_CFI is not set
CONFIG_MTD_M25P80=y
CONFIG_MTD_OF_PARTS=y
# CONFIG_NEED_DMA_MAP_STATE is not set
# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
# CONFIG_NONSTATIC_KERNEL is not set
CONFIG_NR_IRQS=512
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DEVICE=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_MDIO=y
CONFIG_OF_MTD=y
CONFIG_OF_NET=y
CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
CONFIG_P1010_RDB=y
# CONFIG_P1022_DS is not set
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDS is not set
# CONFIG_P2041_RDB is not set
# CONFIG_P3041_DS is not set
# CONFIG_P4080_DS is not set
# CONFIG_P5020_DS is not set
# CONFIG_P5040_DS is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
# CONFIG_PCIEASPM_DEBUG is not set
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PHYLIB=y
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PHYS_64BIT is not set
# CONFIG_PPA8548 is not set
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_PPC64 is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
# CONFIG_PPC_970_NAP is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BOOK3E_MMU=y
# CONFIG_PPC_BOOK3S_32 is not set
# CONFIG_PPC_CELL is not set
# CONFIG_PPC_CELL_NATIVE is not set
# CONFIG_PPC_CLOCK is not set
# CONFIG_PPC_DCR_MMIO is not set
# CONFIG_PPC_DCR_NATIVE is not set
CONFIG_PPC_DOORBELL=y
# CONFIG_PPC_E500MC is not set
# CONFIG_PPC_EARLY_DEBUG is not set
# CONFIG_PPC_EPAPR_HV_PIC is not set
CONFIG_PPC_FSL_BOOK3E=y
CONFIG_PPC_I8259=y
# CONFIG_PPC_ICP_HV is not set
# CONFIG_PPC_ICP_NATIVE is not set
# CONFIG_PPC_ICS_RTAS is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_LIB_RHEAP=y
CONFIG_PPC_MMU_NOHASH=y
# CONFIG_PPC_MM_SLICES is not set
# CONFIG_PPC_MPC106 is not set
CONFIG_PPC_OF=y
# CONFIG_PPC_P7_NAP is not set
CONFIG_PPC_PCI_CHOICE=y
# CONFIG_PPC_QEMU_E500 is not set
# CONFIG_PPC_RTAS is not set
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
# CONFIG_PPC_WSP is not set
# CONFIG_PPC_XICS is not set
# CONFIG_PQ2ADS is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PTP_1588_CLOCK_GIANFAR is not set
CONFIG_QE_GPIO=y
CONFIG_QUICC_ENGINE=y
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
# CONFIG_SBC8548 is not set
CONFIG_SCHED_HRTICK=y
# CONFIG_SCSI_DMA is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
CONFIG_SIMPLE_GPIO=y
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SOCK_DIAG=y
# CONFIG_SOCRATES is not set
CONFIG_SPARSE_IRQ=y
CONFIG_SPE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_FSL_LIB=y
CONFIG_SPI_MASTER=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_STX_GP3 is not set
CONFIG_SWCONFIG=y
CONFIG_SWIOTLB=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TL_WDR4900_V1=y
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
# CONFIG_TQM8548 is not set
# CONFIG_TQM8555 is not set
# CONFIG_TQM8560 is not set
CONFIG_UCC=y
CONFIG_UCC_FAST=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_TX_ON_DEMAND is not set
CONFIG_UIDGID_CONVERTED=y
CONFIG_USB_ARCH_HAS_XHCI=y
CONFIG_USB_SUPPORT=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WORD_SIZE=32
# CONFIG_XES_MPC85xx is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_MPIC_TIMER=y
# CONFIG_C293_PCIE is not set
# CONFIG_TWR_P102x is not set
# CONFIG_CORENET_GENERIC is not set

10
target/linux/mpc85xx/patches-3.14/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch
View File

@@ -1,10 +0,0 @@
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -30,6 +30,7 @@ static struct of_device_id __initdata mp
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+ { .compatible = "gpio-keys", },
/* For all PCI controllers */
{ .compatible = "fsl,mpc8540-pci", },
{ .compatible = "fsl,mpc8548-pcie", },

32
target/linux/mpc85xx/patches-3.14/100-fix_mpc8568e_mds.patch
View File

@@ -1,32 +0,0 @@
--- a/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8568si-post.dtsi
@@ -134,17 +134,8 @@
};
- duart-sleep-nexus {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "simple-bus";
- sleep = <&pmc 0x00000002>;
- ranges;
-
/include/ "pq3-duart-0.dtsi"
- };
-
L2: l2-cache-controller@20000 {
compatible = "fsl,mpc8568-l2-cache-controller";
reg = <0x20000 0x1000>;
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -309,6 +309,9 @@
gpios = <&bcsr5 3 0>;
};
};
+ chosen {
+ linux,stdout-path = "/soc8568@e0000000/serial@4500";
+ };
};
/include/ "fsl/mpc8568si-post.dtsi"

40
target/linux/mpc85xx/patches-3.14/110-fix_mpc8548_cds.patch
View File

@@ -1,40 +0,0 @@
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi
@@ -131,7 +131,24 @@
/include/ "pq3-i2c-0.dtsi"
/include/ "pq3-i2c-1.dtsi"
-/include/ "pq3-duart-0.dtsi"
+
+ serial0: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <42 2 0 0>;
+ };
+
+ serial1: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "fsl,ns16550", "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <42 2 0 0>;
+ };
L2: l2-cache-controller@20000 {
compatible = "fsl,mpc8548-l2-cache-controller";
--- a/arch/powerpc/boot/dts/mpc8548cds_32b.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds_32b.dts
@@ -75,6 +75,9 @@
ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
};
};
+ chosen {
+ linux,stdout-path = "/soc8548@e0000000/serial@4600";
+ };
};
/*

23
target/linux/mpc85xx/patches-3.14/120-mpc8548_cds_i8259_noirq_init.patch
View File

@@ -1,23 +0,0 @@
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -247,15 +247,16 @@ static int mpc85xx_cds_8259_attach(void)
return -ENODEV;
}
+ i8259_init(cascade_node, 0);
+ of_node_put(cascade_node);
+
cascade_irq = irq_of_parse_and_map(cascade_node, 0);
if (cascade_irq == NO_IRQ) {
- printk(KERN_ERR "Failed to map cascade interrupt\n");
+ of_node_put(cascade_node);
+ printk(KERN_DEBUG "No interrupt for i8259 PIC\n");
return -ENXIO;
}
- i8259_init(cascade_node, 0);
- of_node_put(cascade_node);
-
/*
* Hook the interrupt to make sure desc->action is never NULL.
* This is required to ensure that the interrupt does not get

13
target/linux/mpc85xx/patches-3.14/130-mpc8548_cds_disable_i8259_irq.patch
View File

@@ -1,13 +0,0 @@
--- a/arch/powerpc/boot/dts/mpc8548cds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8548cds.dtsi
@@ -289,8 +289,10 @@
#address-cells = <0>;
#interrupt-cells = <2>;
compatible = "chrp,iic";
+/*
interrupts = <0 1 0 0>;
interrupt-parent = <&mpic>;
+*/
};
rtc@70 {

616
target/linux/mpc85xx/patches-3.14/140-powerpc-85xx-tl-wdr4900-v1-support.patch
View File

@@ -1,616 +0,0 @@
From 406d86e5990ac171f18ef6e2973672d8fbfe1556 Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 20 Feb 2013 08:40:33 +0100
Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
board
This patch adds support for the TP-Link TL-WDR4900 v1
concurrent dual-band wireless router. The devices uses
the Freescale P1014 SoC.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
arch/powerpc/boot/Makefile | 3 +
arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 +++++++++++++++++++++
arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 212 ++++++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/platforms/85xx/Kconfig | 11 ++
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++
7 files changed, 540 insertions(+)
create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -99,6 +99,8 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
+src-plat-$(CONFIG_TL_WDR4900_V1) += cuboot-tl-wdr4900-v1.c
+
src-wlib := $(sort $(src-wlib-y))
src-plat := $(sort $(src-plat-y))
@@ -279,6 +281,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_SBC8548) += cuImage.sbc8548
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_TL_WDR4900_V1) += cuImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
image-$(CONFIG_STORCENTER) += cuImage.storcenter
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
@@ -0,0 +1,164 @@
+/*
+ * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
+ *
+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on:
+ * cuboot-85xx.c
+ * Author: Scott Wood <scottwood@freescale.com>
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * simpleboot.c
+ * Authors: Scott Wood <scottwood@freescale.com>
+ * Grant Likely <grant.likely@secretlab.ca>
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2008 Secret Lab Technologies Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "types.h"
+#include "io.h"
+#include "stdio.h"
+#include <libfdt.h>
+
+BSS_STACK(4*1024);
+
+static unsigned long bus_freq;
+static unsigned long int_freq;
+static u64 mem_size;
+static unsigned char enetaddr[6];
+
+static void process_boot_dtb(void *boot_dtb)
+{
+ const u32 *na, *ns, *reg, *val32;
+ const char *path;
+ u64 memsize64;
+ int node, size, i;
+
+ /* Make sure FDT blob is sane */
+ if (fdt_check_header(boot_dtb) != 0)
+ fatal("Invalid device tree blob\n");
+
+ /* Find the #address-cells and #size-cells properties */
+ node = fdt_path_offset(boot_dtb, "/");
+ if (node < 0)
+ fatal("Cannot find root node\n");
+ na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
+ if (!na || (size != 4))
+ fatal("Cannot find #address-cells property");
+
+ ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
+ if (!ns || (size != 4))
+ fatal("Cannot find #size-cells property");
+
+ /* Find the memory range */
+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
+ "memory", sizeof("memory"));
+ if (node < 0)
+ fatal("Cannot find memory node\n");
+ reg = fdt_getprop(boot_dtb, node, "reg", &size);
+ if (size < (*na+*ns) * sizeof(u32))
+ fatal("cannot get memory range\n");
+
+ /* Only interested in memory based at 0 */
+ for (i = 0; i < *na; i++)
+ if (*reg++ != 0)
+ fatal("Memory range is not based at address 0\n");
+
+ /* get the memsize and trucate it to under 4G on 32 bit machines */
+ memsize64 = 0;
+ for (i = 0; i < *ns; i++)
+ memsize64 = (memsize64 << 32) | *reg++;
+ if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
+ memsize64 = 0xffffffff;
+
+ mem_size = memsize64;
+
+ /* get clock frequencies */
+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
+ "cpu", sizeof("cpu"));
+ if (!node)
+ fatal("Cannot find cpu node\n");
+
+ val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
+ if (!val32 || (size != 4))
+ fatal("Cannot get clock frequency");
+
+ int_freq = *val32;
+
+ val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
+ if (!val32 || (size != 4))
+ fatal("Cannot get bus frequency");
+
+ bus_freq = *val32;
+
+ path = fdt_get_alias(boot_dtb, "ethernet0");
+ if (path) {
+ const void *p;
+
+ node = fdt_path_offset(boot_dtb, path);
+ if (node < 0)
+ fatal("Cannot find ethernet0 node");
+
+ p = fdt_getprop(boot_dtb, node, "mac-address", &size);
+ if (!p || (size < 6)) {
+ printf("no mac-address property, finding local\n\r");
+ p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
+ }
+
+ if (!p || (size < 6))
+ fatal("cannot get MAC addres");
+
+ memcpy(enetaddr, p, sizeof(enetaddr));
+ }
+}
+
+static void platform_fixups(void)
+{
+ void *soc;
+
+ dt_fixup_memory(0, mem_size);
+
+ dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
+ dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
+
+ /* Unfortunately, the specific model number is encoded in the
+ * soc node name in existing dts files -- once that is fixed,
+ * this can do a simple path lookup.
+ */
+ soc = find_node_by_devtype(NULL, "soc");
+ if (soc) {
+ void *serial = NULL;
+
+ setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
+
+ while ((serial = find_node_by_devtype(serial, "serial"))) {
+ if (get_parent(serial) != soc)
+ continue;
+
+ setprop(serial, "clock-frequency", &bus_freq,
+ sizeof(bus_freq));
+ }
+ }
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ mem_size = 64 * 1024 * 1024;
+
+ simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
+
+ fdt_init(_dtb_start);
+ serial_console_init();
+
+ printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
+
+ process_boot_dtb((void *) r3);
+
+ platform_ops.fixups = platform_fixups;
+}
--- /dev/null
+++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
@@ -0,0 +1,212 @@
+/*
+ * TP-Link TL-WDR4900 v1 Device Tree Source
+ *
+ * Copyright 2013 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+ model = "TP-Link TL-WDR4900 v1";
+ compatible = "tp-link,TL-WDR4900v1";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+/*
+ linux,stdout-path = "/soc@ffe00000/serial@4500";
+*/
+ };
+
+ aliases {
+ spi0 = &spi0;
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+ spi0: spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25fl129p1";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ u-boot@0 {
+ reg = <0x0 0x0050000>;
+ label = "u-boot";
+ read-only;
+ };
+
+ dtb@50000 {
+ reg = <0x00050000 0x00010000>;
+ label = "dtb";
+ read-only;
+ };
+
+ kernel@60000 {
+ reg = <0x00060000 0x002a0000>;
+ label = "kernel";
+ };
+
+ rootfs@300000 {
+ reg = <0x00300000 0x00ce0000>;
+ label = "rootfs";
+ };
+
+ config@fe0000 {
+ reg = <0x00fe0000 0x00010000>;
+ label = "config";
+ read-only;
+ };
+
+ caldata@ff0000 {
+ reg = <0x00ff0000 0x00010000>;
+ label = "caldata";
+ read-only;
+ };
+
+ firmware@60000 {
+ reg = <0x00060000 0x00f80000>;
+ label = "firmware";
+ };
+ };
+ };
+
+ gpio0: gpio-controller@f000 {
+ };
+
+ usb@22000 {
+ phy_type = "utmi";
+ dr_mode = "host";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ qca,ar8327-initvals = <
+ 0x00004 0x07600000 /* PAD0_MODE */
+ 0x00008 0x00000000 /* PAD5_MODE */
+ 0x0000c 0x01000000 /* PAD6_MODE */
+ 0x00010 0x40000000 /* POWER_ON_STRIP */
+ 0x00050 0xcf35cf35 /* LED_CTRL0 */
+ 0x00054 0xcf35cf35 /* LED_CTRL1 */
+ 0x00058 0xcf35cf35 /* LED_CTRL2 */
+ 0x0005c 0x03ffff00 /* LED_CTRL3 */
+ 0x0007c 0x0000007e /* PORT0_STATUS */
+ >;
+ };
+ };
+
+ mdio@25000 {
+ status = "disabled";
+ };
+
+ mdio@26000 {
+ status = "disabled";
+ };
+
+ enet0: ethernet@b0000 {
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@b1000 {
+ status = "disabled";
+ };
+
+ enet2: ethernet@b2000 {
+ status = "disabled";
+ };
+
+ sdhc@2e000 {
+ status = "disabled";
+ };
+
+ serial1: serial@4600 {
+ status = "disabled";
+ };
+
+ can0: can@1c000 {
+ status = "disabled";
+ };
+
+ can1: can@1d000 {
+ status = "disabled";
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ reg = <0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ ifc: ifc@ffe1e000 {
+ status = "disabled";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ gpios = <&gpio0 2 1>; /* active low */
+ label = "tp-link:blue:system";
+ };
+
+ usb1 {
+ gpios = <&gpio0 3 1>; /* active low */
+ label = "tp-link:green:usb1";
+ };
+
+ usb2 {
+ gpios = <&gpio0 4 1>; /* active low */
+ label = "tp-link:green:usb2";
+ };
+ };
+
+ buttons {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "Reset button";
+ gpios = <&gpio0 5 1>; /* active low */
+ linux,code = <0x198>; /* KEY_RESTART */
+ };
+ };
+};
+
+/include/ "fsl/p1010si-post.dtsi"
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -205,6 +205,10 @@ cuboot*)
*-mpc85*|*-tqm85*|*-sbc85*)
platformo=$object/cuboot-85xx.o
;;
+ *-tl-wdr4900-v1)
+ platformo=$object/cuboot-tl-wdr4900-v1.o
+ link_address='0x1000000'
+ ;;
*-amigaone)
link_address='0x800000'
;;
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -159,6 +159,17 @@ config STX_GP3
select CPM2
select DEFAULT_UIMAGE
+config TL_WDR4900_V1
+ bool "TP-Link TL-WDR4900 v1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the TP-Link TL-WDR4900 v1 board.
+
+ This board is a Concurrent Dual-Band wireless router with a
+ Freescale P1014 SoC.
+
config TQM8540
bool "TQ Components TQM8540"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
obj-$(CONFIG_SBC8548) += sbc8548.o
obj-$(CONFIG_PPA8548) += ppa8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
@@ -0,0 +1,145 @@
+/*
+ * TL-WDR4900 v1 board setup
+ *
+ * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Based on:
+ * p1010rdb.c:
+ * P1010RDB Board Setup
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+#include <linux/ath9k_platform.h>
+#include <linux/leds.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+void __init tl_wdr4900_v1_pic_init(void)
+{
+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU,
+ 0, 256, " OpenPIC ");
+
+ BUG_ON(mpic == NULL);
+
+ mpic_init(mpic);
+}
+
+#ifdef CONFIG_PCI
+static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
+ {
+ .name = "tp-link:blue:wps",
+ .gpio = 1,
+ .active_low = 1,
+ },
+};
+
+static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
+ .led_pin = 0,
+ .eeprom_name = "pci_wmac0.eeprom",
+ .leds = tl_wdr4900_v1_wmac_leds_gpio,
+ .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
+};
+
+static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
+ .led_pin = 0,
+ .eeprom_name = "pci_wmac1.eeprom",
+};
+
+static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
+{
+ if (!machine_is(tl_wdr4900_v1))
+ return;
+
+ if (dev->bus->number == 1 &&
+ PCI_SLOT(dev->devfn) == 0) {
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
+ return;
+ }
+
+ if (dev->bus->number == 3 &&
+ PCI_SLOT(dev->devfn) == 0 &&
+ dev->device == 0xabcd) {
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
+
+ /*
+ * The PCI header of the AR9381 chip is not programmed
+ * correctly by the bootloader and the device uses wrong
+ * data due to that. Replace the broken values with the
+ * correct ones.
+ */
+ dev->device = 0x30;
+ dev->class = 0x028000;
+
+ pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
+ }
+}
+
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
+ tl_wdr4900_v1_pci_wmac_fixup);
+#endif /* CONFIG_PCI */
+
+/*
+ * Setup the architecture
+ */
+static void __init tl_wdr4900_v1_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
+
+ fsl_pci_assign_primary();
+
+ printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
+}
+
+machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
+machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init tl_wdr4900_v1_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
+ return 1;
+
+ return 0;
+}
+
+define_machine(tl_wdr4900_v1) {
+ .name = "Freescale P1014",
+ .probe = tl_wdr4900_v1_probe,
+ .setup_arch = tl_wdr4900_v1_setup_arch,
+ .init_IRQ = tl_wdr4900_v1_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};

30
target/linux/mpc85xx/patches-3.14/150-powerpc-85xx-fix-etsec-ranges.patch
View File

@@ -1,30 +0,0 @@
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi
@@ -50,6 +50,7 @@ ethernet@b0000 {
fsl,num_tx_queues = <0x8>;
fsl,magic-packet;
local-mac-address = [ 00 00 00 00 00 00 ];
+ ranges;
queue-group@b0000 {
#address-cells = <1>;
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-1.dtsi
@@ -50,6 +50,7 @@ ethernet@b1000 {
fsl,num_tx_queues = <0x8>;
fsl,magic-packet;
local-mac-address = [ 00 00 00 00 00 00 ];
+ ranges;
queue-group@b1000 {
#address-cells = <1>;
--- a/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-etsec2-2.dtsi
@@ -49,6 +49,7 @@ ethernet@b2000 {
fsl,num_tx_queues = <0x8>;
fsl,magic-packet;
local-mac-address = [ 00 00 00 00 00 00 ];
+ ranges;
queue-group@b2000 {
#address-cells = <1>;

147
target/linux/mpc85xx/patches-3.14/210-spi-fsl-espi-preallocate-local-buffer.patch
View File

@@ -1,147 +0,0 @@
From: Gabor Juhos <juhosg@openwrt.org>
Subject: spi-fsl-espi: avoid frequent high order allocations
The driver allocates 64KiB of memory fro a local buffer before
each transfer and releases that afterwards. When the memory is
fragmented this allocation often fails and causes a warning like
this:
kworker/u2:2: page allocation failure: order:4, mode:0x10c0d0
CPU: 0 PID: 7011 Comm: kworker/u2:2 Not tainted 3.10.24 #1
Workqueue: ffe07000.spi mpc8xxx_spi_work
Call Trace:
[c1c6dcf0] [c0006914] show_stack+0x50/0x170 (unreliable)
[c1c6dd30] [c0259858] dump_stack+0x24/0x34
[c1c6dd40] [c00672e8] warn_alloc_failed+0x120/0x13c
[c1c6dd90] [c0069920] __alloc_pages_nodemask+0x574/0x5c8
[c1c6de20] [c0069990] __get_free_pages+0x1c/0x4c
[c1c6de30] [c0185174] fsl_espi_do_one_msg+0x128/0x2a0
[c1c6de90] [c0184290] mpc8xxx_spi_work+0x50/0x7c
[c1c6dea0] [c0037af8] process_one_work+0x208/0x30c
[c1c6dec0] [c00387a0] worker_thread+0x20c/0x308
[c1c6def0] [c003de60] kthread+0xa4/0xa8
[c1c6df40] [c000c4bc] ret_from_kernel_thread+0x5c/0x64
m25p80 spi0.0: error -12 reading SR
end_request: I/O error, dev mtdblock3, sector 680
SQUASHFS error: squashfs_read_data failed to read block 0x54a4a
SQUASHFS error: Unable to read data cache entry [54a4a]
Preallocate the buffer from the probe routine to avoid
this.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
---
drivers/spi/spi-fsl-espi.c | 34 ++++++++++++++++------------------
drivers/spi/spi-fsl-lib.h | 1 +
2 files changed, 17 insertions(+), 18 deletions(-)
--- a/drivers/spi/spi-fsl-espi.c
+++ b/drivers/spi/spi-fsl-espi.c
@@ -334,17 +334,13 @@ static void fsl_espi_do_trans(struct spi
static void fsl_espi_cmd_trans(struct spi_message *m,
struct fsl_espi_transfer *trans, u8 *rx_buff)
{
+ struct spi_device *spi = m->spi;
+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
struct spi_transfer *t;
- u8 *local_buf;
+ u8 *local_buf = mspi->local_buf;
int i = 0;
struct fsl_espi_transfer *espi_trans = trans;
- local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
- if (!local_buf) {
- espi_trans->status = -ENOMEM;
- return;
- }
-
list_for_each_entry(t, &m->transfers, transfer_list) {
if (t->tx_buf) {
memcpy(local_buf + i, t->tx_buf, t->len);
@@ -357,28 +353,23 @@ static void fsl_espi_cmd_trans(struct sp
fsl_espi_do_trans(m, espi_trans);
espi_trans->actual_length = espi_trans->len;
- kfree(local_buf);
}
static void fsl_espi_rw_trans(struct spi_message *m,
struct fsl_espi_transfer *trans, u8 *rx_buff)
{
+ struct spi_device *spi = m->spi;
+ struct mpc8xxx_spi *mspi = spi_master_get_devdata(spi->master);
struct fsl_espi_transfer *espi_trans = trans;
unsigned int n_tx = espi_trans->n_tx;
unsigned int n_rx = espi_trans->n_rx;
struct spi_transfer *t;
- u8 *local_buf;
+ u8 *local_buf = mspi->local_buf;
u8 *rx_buf = rx_buff;
unsigned int trans_len;
unsigned int addr;
int i, pos, loop;
- local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
- if (!local_buf) {
- espi_trans->status = -ENOMEM;
- return;
- }
-
for (pos = 0, loop = 0; pos < n_rx; pos += trans_len, loop++) {
trans_len = n_rx - pos;
if (trans_len > SPCOM_TRANLEN_MAX - n_tx)
@@ -412,8 +403,6 @@ static void fsl_espi_rw_trans(struct spi
else
espi_trans->actual_length += espi_trans->len;
}
-
- kfree(local_buf);
}
static void fsl_espi_do_one_msg(struct spi_message *m)
@@ -581,6 +570,7 @@ static irqreturn_t fsl_espi_irq(s32 irq,
static void fsl_espi_remove(struct mpc8xxx_spi *mspi)
{
iounmap(mspi->reg_base);
+ kfree(mspi->local_buf);
}
static struct spi_master * fsl_espi_probe(struct device *dev,
@@ -612,10 +602,16 @@ static struct spi_master * fsl_espi_prob
mpc8xxx_spi->spi_do_one_msg = fsl_espi_do_one_msg;
mpc8xxx_spi->spi_remove = fsl_espi_remove;
+ mpc8xxx_spi->local_buf = kzalloc(SPCOM_TRANLEN_MAX, GFP_KERNEL);
+ if (!mpc8xxx_spi->local_buf) {
+ ret = -ENOMEM;
+ goto err_probe;
+ }
+
mpc8xxx_spi->reg_base = ioremap(mem->start, resource_size(mem));
if (!mpc8xxx_spi->reg_base) {
ret = -ENOMEM;
- goto err_probe;
+ goto free_buf;
}
reg_base = mpc8xxx_spi->reg_base;
@@ -658,6 +654,8 @@ unreg_master:
free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
free_irq:
iounmap(mpc8xxx_spi->reg_base);
+free_buf:
+ kfree(mpc8xxx_spi->local_buf);
err_probe:
spi_master_put(master);
err:
--- a/drivers/spi/spi-fsl-lib.h
+++ b/drivers/spi/spi-fsl-lib.h
@@ -30,6 +30,7 @@ struct mpc8xxx_spi {
void *rx;
#ifdef CONFIG_SPI_FSL_ESPI
int len;
+ u8 *local_buf;
#endif
int subblock;