116 lines
3.3 KiB
Diff
116 lines
3.3 KiB
Diff
From 0af44917941cbfecdc86bb9bf05ff01d22a88973 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Sun, 7 Feb 2021 16:52:56 +0100
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Subject: [PATCH 1/4] ipq806x: gcc: add missing clk flag
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Some flag are missing from the original code.
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These clk can't be set using the protected-clock proprities as they
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cause the malfunction of the serial interface.
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These clks are needed for the rpm interface to work proprely or the
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cpu regulators starts to fail as soon as they are disabled by the
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kernel.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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---
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drivers/clk/qcom/gcc-ipq806x.c | 19 +++++++++++++------
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1 file changed, 13 insertions(+), 6 deletions(-)
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--- a/drivers/clk/qcom/gcc-ipq806x.c
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+++ b/drivers/clk/qcom/gcc-ipq806x.c
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@@ -65,6 +65,7 @@ static struct clk_pll pll3 = {
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.parent_names = (const char *[]){ "pxo" },
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.num_parents = 1,
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.ops = &clk_pll_ops,
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+ .flags = CLK_IS_CRITICAL,
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},
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};
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@@ -782,7 +783,7 @@ static struct clk_rcg gsbi4_qup_src = {
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.parent_names = gcc_pxo_pll8,
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.num_parents = 2,
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.ops = &clk_rcg_ops,
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- .flags = CLK_SET_PARENT_GATE,
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+ .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
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},
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},
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};
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@@ -798,7 +799,7 @@ static struct clk_branch gsbi4_qup_clk =
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.parent_names = (const char *[]){ "gsbi4_qup_src" },
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.num_parents = 1,
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.ops = &clk_branch_ops,
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- .flags = CLK_SET_RATE_PARENT,
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+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
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},
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},
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};
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@@ -880,7 +881,7 @@ static struct clk_rcg gsbi6_qup_src = {
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.parent_names = gcc_pxo_pll8,
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.num_parents = 2,
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.ops = &clk_rcg_ops,
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- .flags = CLK_SET_PARENT_GATE,
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+ .flags = CLK_SET_PARENT_GATE | CLK_IGNORE_UNUSED,
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},
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},
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};
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@@ -945,7 +946,7 @@ static struct clk_branch gsbi7_qup_clk =
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.parent_names = (const char *[]){ "gsbi7_qup_src" },
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.num_parents = 1,
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.ops = &clk_branch_ops,
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- .flags = CLK_SET_RATE_PARENT,
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+ .flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
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},
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},
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};
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@@ -991,6 +992,7 @@ static struct clk_branch gsbi4_h_clk = {
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.hw.init = &(struct clk_init_data){
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.name = "gsbi4_h_clk",
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.ops = &clk_branch_ops,
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+ .flags = CLK_IGNORE_UNUSED,
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},
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},
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};
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@@ -1293,6 +1295,7 @@ static struct clk_rcg sdc1_src = {
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.parent_names = gcc_pxo_pll8,
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.num_parents = 2,
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.ops = &clk_rcg_ops,
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+ .flags = CLK_SET_RATE_GATE,
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},
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}
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};
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@@ -1341,6 +1344,7 @@ static struct clk_rcg sdc3_src = {
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.parent_names = gcc_pxo_pll8,
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.num_parents = 2,
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.ops = &clk_rcg_ops,
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+ .flags = CLK_SET_RATE_GATE,
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},
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}
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};
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@@ -1424,6 +1428,7 @@ static struct clk_rcg tsif_ref_src = {
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.parent_names = gcc_pxo_pll8,
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.num_parents = 2,
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.ops = &clk_rcg_ops,
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+ .flags = CLK_SET_RATE_GATE,
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},
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}
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};
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@@ -2694,7 +2699,8 @@ static struct clk_dyn_rcg ubi32_core1_sr
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.parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
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.num_parents = 5,
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.ops = &clk_dyn_rcg_ops,
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- .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
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+ .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
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+ CLK_IGNORE_UNUSED,
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},
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},
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};
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@@ -2747,7 +2753,8 @@ static struct clk_dyn_rcg ubi32_core2_sr
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.parent_names = gcc_pxo_pll8_pll14_pll18_pll0,
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.num_parents = 5,
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.ops = &clk_dyn_rcg_ops,
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- .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
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+ .flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE |
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+ CLK_IGNORE_UNUSED,
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},
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},
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};
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