cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
66 lines
2.9 KiB
Diff
66 lines
2.9 KiB
Diff
From ad5077a8da6e8aad01b7b6ad979b52c39118969d Mon Sep 17 00:00:00 2001
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From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Date: Tue, 17 Dec 2019 13:26:37 +0200
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Subject: [PATCH] arm64: dts: lx2160a: add iommu-map property to pci nodes
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Add the iommu-map property to the pci nodes so that the firmware
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fixes it up with the required values thus enabling iommu for
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devices connected over pci.
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Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
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Acked-by: Li Yang <leoyang.li@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
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@@ -954,6 +954,7 @@
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bus-range = <0x0 0xff>;
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ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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@@ -990,6 +991,7 @@
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bus-range = <0x0 0xff>;
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ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
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@@ -1026,6 +1028,7 @@
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bus-range = <0x0 0xff>;
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ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
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@@ -1063,6 +1066,7 @@
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bus-range = <0x0 0xff>;
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ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
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@@ -1099,6 +1103,7 @@
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bus-range = <0x0 0xff>;
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ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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@@ -1136,6 +1141,7 @@
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bus-range = <0x0 0xff>;
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ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
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msi-parent = <&its>;
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+ iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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