 cddd459140
			
		
	
	cddd459140
	
	
	
		
			
			Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
		
			
				
	
	
		
			64 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From d176f477fd2acded12356088c0f67dee059facb5 Mon Sep 17 00:00:00 2001
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| From: Vladimir Oltean <vladimir.oltean@nxp.com>
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| Date: Sat, 9 Nov 2019 15:03:01 +0200
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| Subject: [PATCH] net: mscc: ocelot: don't hardcode the number of the CPU port
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| 
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| VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the
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| queuing subsystem for terminating traffic locally).
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| 
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| There are 2 issues with hardcoding the CPU port as #10:
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| - It is not clear which snippets of the code are configuring something
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|   for one of the CPU ports, and which snippets are just doing something
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|   related to the number of physical ports.
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| - Actually any physical port can act as a CPU port connected to an
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|   external CPU (in addition to the local CPU). This is called NPI mode
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|   (Node Processor Interface) and is the way that the 6-port VSC9959
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|   (Felix) switch is integrated inside NXP LS1028A (the "local management
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|   CPU" functionality is not used there).
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| 
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| This patch makes it clear that the ocelot_bridge_stp_state_set function
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| operates on the CPU port (by making it an implicit member of the
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| bridging domain), and at the same time adds logic for the NPI port (aka
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| a physical port) to play the role of a CPU port (it shouldn't be part of
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| bridge_fwd_mask, as it's not explicitly enslaved to a bridge).
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| 
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| Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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| Signed-off-by: David S. Miller <davem@davemloft.net>
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| ---
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|  drivers/net/ethernet/mscc/ocelot.c | 11 +++++++----
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|  1 file changed, 7 insertions(+), 4 deletions(-)
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| 
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| --- a/drivers/net/ethernet/mscc/ocelot.c
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| +++ b/drivers/net/ethernet/mscc/ocelot.c
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| @@ -1383,7 +1383,7 @@ static void ocelot_bridge_stp_state_set(
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|  	 * a source for the other ports.
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|  	 */
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|  	for (p = 0; p < ocelot->num_phys_ports; p++) {
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| -		if (ocelot->bridge_fwd_mask & BIT(p)) {
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| +		if (p == ocelot->cpu || (ocelot->bridge_fwd_mask & BIT(p))) {
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|  			unsigned long mask = ocelot->bridge_fwd_mask & ~BIT(p);
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|  
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|  			for (i = 0; i < ocelot->num_phys_ports; i++) {
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| @@ -1398,15 +1398,18 @@ static void ocelot_bridge_stp_state_set(
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|  				}
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|  			}
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|  
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| -			ocelot_write_rix(ocelot,
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| -					 BIT(ocelot->num_phys_ports) | mask,
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| +			/* Avoid the NPI port from looping back to itself */
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| +			if (p != ocelot->cpu)
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| +				mask |= BIT(ocelot->cpu);
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| +
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| +			ocelot_write_rix(ocelot, mask,
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|  					 ANA_PGID_PGID, PGID_SRC + p);
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|  		} else {
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|  			/* Only the CPU port, this is compatible with link
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|  			 * aggregation.
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|  			 */
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|  			ocelot_write_rix(ocelot,
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| -					 BIT(ocelot->num_phys_ports),
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| +					 BIT(ocelot->cpu),
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|  					 ANA_PGID_PGID, PGID_SRC + p);
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|  		}
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|  	}
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