f25cebc43c
Removed upstreamed: hack-5.4/991-platform-x86-pcengines-apuv2-revert-simswitch.patch All other patches automatically rebased. Build system: x86_64 Build-tested: ipq806x/R7800 Run-tested: ipq806x/R7800 No dmesg regressions, everything functional Signed-off-by: John Audia <graysky@archlinux.us>
146 lines
4.4 KiB
Diff
146 lines
4.4 KiB
Diff
From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
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Date: Fri, 27 Mar 2020 15:44:12 +0100
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Subject: [PATCH] net: dsa: mt7530: use resolved link config in mac_link_up()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Convert the mt7530 switch driver to use the finalised link
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parameters in mac_link_up() rather than the parameters in mac_config().
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Signed-off-by: René van Dorst <opensource@vdorst.com>
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Tested-by: Sean Wang <sean.wang@mediatek.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -489,17 +489,6 @@ mt7530_mib_reset(struct dsa_switch *ds)
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mt7530_write(priv, MT7530_MIB_CCR, CCR_MIB_ACTIVATE);
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}
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-static void
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-mt7530_port_set_status(struct mt7530_priv *priv, int port, int enable)
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-{
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- u32 mask = PMCR_TX_EN | PMCR_RX_EN | PMCR_FORCE_LNK;
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-
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- if (enable)
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- mt7530_set(priv, MT7530_PMCR_P(port), mask);
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- else
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- mt7530_clear(priv, MT7530_PMCR_P(port), mask);
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-}
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-
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static int mt7530_phy_read(struct dsa_switch *ds, int port, int regnum)
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{
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struct mt7530_priv *priv = ds->priv;
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@@ -673,7 +662,7 @@ mt7530_port_enable(struct dsa_switch *ds
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priv->ports[port].enable = true;
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mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
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priv->ports[port].pm);
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- mt7530_port_set_status(priv, port, 0);
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+ mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
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mutex_unlock(&priv->reg_mutex);
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@@ -696,7 +685,7 @@ mt7530_port_disable(struct dsa_switch *d
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priv->ports[port].enable = false;
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mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
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PCR_MATRIX_CLR);
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- mt7530_port_set_status(priv, port, 0);
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+ mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
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mutex_unlock(&priv->reg_mutex);
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}
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@@ -1398,8 +1387,7 @@ static void mt7530_phylink_mac_config(st
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mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port));
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mcr_new = mcr_cur;
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- mcr_new &= ~(PMCR_FORCE_SPEED_1000 | PMCR_FORCE_SPEED_100 |
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- PMCR_FORCE_FDX | PMCR_TX_FC_EN | PMCR_RX_FC_EN);
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+ mcr_new &= ~PMCR_LINK_SETTINGS_MASK;
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mcr_new |= PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | PMCR_BACKOFF_EN |
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PMCR_BACKPR_EN | PMCR_FORCE_MODE;
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@@ -1407,26 +1395,6 @@ static void mt7530_phylink_mac_config(st
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if (port == 5 && dsa_is_user_port(ds, 5))
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mcr_new |= PMCR_EXT_PHY;
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- switch (state->speed) {
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- case SPEED_1000:
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- mcr_new |= PMCR_FORCE_SPEED_1000;
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- if (priv->eee_enable & BIT(port))
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- mcr_new |= PMCR_FORCE_EEE1G;
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- break;
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- case SPEED_100:
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- mcr_new |= PMCR_FORCE_SPEED_100;
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- if (priv->eee_enable & BIT(port))
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- mcr_new |= PMCR_FORCE_EEE100;
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- break;
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- }
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- if (state->duplex == DUPLEX_FULL) {
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- mcr_new |= PMCR_FORCE_FDX;
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- if (state->pause & MLO_PAUSE_TX)
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- mcr_new |= PMCR_TX_FC_EN;
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- if (state->pause & MLO_PAUSE_RX)
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- mcr_new |= PMCR_RX_FC_EN;
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- }
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-
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if (mcr_new != mcr_cur)
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mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
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}
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@@ -1437,7 +1405,7 @@ static void mt7530_phylink_mac_link_down
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{
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struct mt7530_priv *priv = ds->priv;
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- mt7530_port_set_status(priv, port, 0);
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+ mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
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}
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static void mt7530_phylink_mac_link_up(struct dsa_switch *ds, int port,
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@@ -1448,8 +1416,31 @@ static void mt7530_phylink_mac_link_up(s
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bool tx_pause, bool rx_pause)
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{
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struct mt7530_priv *priv = ds->priv;
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+ u32 mcr;
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+
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+ mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
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+
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+ switch (speed) {
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+ case SPEED_1000:
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+ mcr |= PMCR_FORCE_SPEED_1000;
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+ if (priv->eee_enable & BIT(port))
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+ mcr_new |= PMCR_FORCE_EEE1G;
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+ break;
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+ case SPEED_100:
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+ mcr |= PMCR_FORCE_SPEED_100;
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+ if (priv->eee_enable & BIT(port))
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+ mcr_new |= PMCR_FORCE_EEE100;
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+ break;
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+ }
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+ if (duplex == DUPLEX_FULL) {
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+ mcr |= PMCR_FORCE_FDX;
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+ if (tx_pause)
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+ mcr |= PMCR_TX_FC_EN;
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+ if (rx_pause)
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+ mcr |= PMCR_RX_FC_EN;
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+ }
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- mt7530_port_set_status(priv, port, 1);
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+ mt7530_set(priv, MT7530_PMCR_P(port), mcr);
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}
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static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -222,6 +222,10 @@ enum mt7530_vlan_port_attr {
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#define PMCR_FORCE_LNK BIT(0)
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#define PMCR_SPEED_MASK (PMCR_FORCE_SPEED_100 | \
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PMCR_FORCE_SPEED_1000)
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+#define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
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+ PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
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+ PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
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+ PMCR_FORCE_FDX | PMCR_FORCE_LNK)
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#define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100)
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#define PMSR_EEE1G BIT(7)
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