62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
86 lines
2.7 KiB
Diff
86 lines
2.7 KiB
Diff
From e399911ab20b650a031d883554180463804ac3f7 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.org>
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Date: Tue, 4 Jun 2019 12:14:30 +0100
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Subject: [PATCH] drm: vc4: Add status of which display is updated
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through vblank
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Previously multiple displays were slaved off the same SMI
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interrupt, triggered by HVS channel 1 (HDMI0).
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This doesn't work if you only have a DPI or DSI screen (HVS channel
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0), and gives slightly erroneous results with dual HDMI as the
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events for HDMI1 are incorrect.
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Use SMIDSW0 and SMIDSW1 registers to denote which display has
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triggered the vblank.
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Handling should be backwards compatible with older firmware.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
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---
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drivers/gpu/drm/vc4/vc4_firmware_kms.c | 41 ++++++++++++++++++++++----
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1 file changed, 36 insertions(+), 5 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c
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+++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c
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@@ -233,8 +233,13 @@ static const struct vc_image_format *vc4
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* hardware, which has only this one register.
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*/
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#define SMICS 0x0
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+#define SMIDSW0 0x14
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+#define SMIDSW1 0x1C
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#define SMICS_INTERRUPTS (BIT(9) | BIT(10) | BIT(11))
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+/* Flag to denote that the firmware is giving multiple display callbacks */
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+#define SMI_NEW 0xabcd0000
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+
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#define vc4_crtc vc4_kms_crtc
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#define to_vc4_crtc to_vc4_kms_crtc
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struct vc4_crtc {
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@@ -885,16 +890,42 @@ static irqreturn_t vc4_crtc_irq_handler(
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int i;
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u32 stat = readl(crtc_list[0]->regs + SMICS);
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irqreturn_t ret = IRQ_NONE;
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+ u32 chan;
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if (stat & SMICS_INTERRUPTS) {
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writel(0, crtc_list[0]->regs + SMICS);
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- for (i = 0; crtc_list[i]; i++) {
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- if (crtc_list[i]->vblank_enabled)
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- drm_crtc_handle_vblank(&crtc_list[i]->base);
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- vc4_crtc_handle_page_flip(crtc_list[i]);
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- ret = IRQ_HANDLED;
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+ chan = readl(crtc_list[0]->regs + SMIDSW0);
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+
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+ if ((chan & 0xFFFF0000) != SMI_NEW) {
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+ /* Older firmware. Treat the one interrupt as vblank/
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+ * complete for all crtcs.
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+ */
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+ for (i = 0; crtc_list[i]; i++) {
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+ if (crtc_list[i]->vblank_enabled)
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+ drm_crtc_handle_vblank(&crtc_list[i]->base);
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+ vc4_crtc_handle_page_flip(crtc_list[i]);
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+ }
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+ } else {
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+ if (chan & 1) {
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+ writel(SMI_NEW, crtc_list[0]->regs + SMIDSW0);
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+ if (crtc_list[0]->vblank_enabled)
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+ drm_crtc_handle_vblank(&crtc_list[0]->base);
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+ vc4_crtc_handle_page_flip(crtc_list[0]);
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+ }
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+
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+ /* Check for the secondary display too */
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+ chan = readl(crtc_list[0]->regs + SMIDSW1);
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+
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+ if (chan & 1) {
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+ writel(SMI_NEW, crtc_list[0]->regs + SMIDSW1);
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+ if (crtc_list[1]->vblank_enabled)
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+ drm_crtc_handle_vblank(&crtc_list[1]->base);
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+ vc4_crtc_handle_page_flip(crtc_list[1]);
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+ }
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}
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+
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+ ret = IRQ_HANDLED;
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}
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return ret;
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