 7ace30aeb6
			
		
	
	7ace30aeb6
	
	
	
		
			
			Backport upstream code split patch for qca8k needed for ipq40xx target to correctly implement a DSA driver. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
		
			
				
	
	
		
			174 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			174 lines
		
	
	
		
			5.3 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 8255212e4130bd2dc1463286a3dddb74797bbdc1 Mon Sep 17 00:00:00 2001
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| From: Ansuel Smith <ansuelsmth@gmail.com>
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| Date: Sat, 16 Apr 2022 01:30:14 +0200
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| Subject: [PATCH 3/6] net: dsa: qca8k: rework and simplify mdiobus logic
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| 
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| In an attempt to reduce qca8k_priv space, rework and simplify mdiobus
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| logic.
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| We now declare a mdiobus instead of relying on DSA phy_read/write even
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| if a mdio node is not present. This is all to make the qca8k ops static
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| and not switch specific. With a legacy implementation where port doesn't
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| have a phy map declared in the dts with a mdio node, we declare a
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| 'qca8k-legacy' mdiobus. The conversion logic is used as legacy read and
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| write ops are used instead of the internal one.
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| Also drop the legacy_phy_port_mapping as we now declare mdiobus with ops
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| that already address the workaround.
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| 
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| Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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| Signed-off-by: David S. Miller <davem@davemloft.net>
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| ---
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|  drivers/net/dsa/qca8k.c | 95 +++++++++++++----------------------------
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|  drivers/net/dsa/qca8k.h |  1 -
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|  2 files changed, 29 insertions(+), 67 deletions(-)
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| 
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| --- a/drivers/net/dsa/qca8k.c
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| +++ b/drivers/net/dsa/qca8k.c
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| @@ -1291,83 +1291,63 @@ qca8k_internal_mdio_read(struct mii_bus
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|  }
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|  
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|  static int
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| -qca8k_phy_write(struct dsa_switch *ds, int port, int regnum, u16 data)
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| +qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data)
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|  {
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| -	struct qca8k_priv *priv = ds->priv;
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| -	int ret;
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| +	port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
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|  
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| -	/* Check if the legacy mapping should be used and the
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| -	 * port is not correctly mapped to the right PHY in the
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| -	 * devicetree
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| -	 */
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| -	if (priv->legacy_phy_port_mapping)
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| -		port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
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| -
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| -	/* Use mdio Ethernet when available, fallback to legacy one on error */
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| -	ret = qca8k_phy_eth_command(priv, false, port, regnum, 0);
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| -	if (!ret)
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| -		return ret;
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| -
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| -	return qca8k_mdio_write(priv, port, regnum, data);
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| +	return qca8k_internal_mdio_write(slave_bus, port, regnum, data);
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|  }
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|  
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|  static int
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| -qca8k_phy_read(struct dsa_switch *ds, int port, int regnum)
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| +qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum)
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|  {
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| -	struct qca8k_priv *priv = ds->priv;
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| -	int ret;
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| -
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| -	/* Check if the legacy mapping should be used and the
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| -	 * port is not correctly mapped to the right PHY in the
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| -	 * devicetree
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| -	 */
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| -	if (priv->legacy_phy_port_mapping)
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| -		port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
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| -
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| -	/* Use mdio Ethernet when available, fallback to legacy one on error */
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| -	ret = qca8k_phy_eth_command(priv, true, port, regnum, 0);
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| -	if (ret >= 0)
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| -		return ret;
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| -
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| -	ret = qca8k_mdio_read(priv, port, regnum);
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| -
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| -	if (ret < 0)
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| -		return 0xffff;
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| +	port = qca8k_port_to_phy(port) % PHY_MAX_ADDR;
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|  
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| -	return ret;
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| +	return qca8k_internal_mdio_read(slave_bus, port, regnum);
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|  }
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|  
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|  static int
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| -qca8k_mdio_register(struct qca8k_priv *priv, struct device_node *mdio)
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| +qca8k_mdio_register(struct qca8k_priv *priv)
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|  {
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|  	struct dsa_switch *ds = priv->ds;
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| +	struct device_node *mdio;
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|  	struct mii_bus *bus;
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|  
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|  	bus = devm_mdiobus_alloc(ds->dev);
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| -
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|  	if (!bus)
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|  		return -ENOMEM;
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|  
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|  	bus->priv = (void *)priv;
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| -	bus->name = "qca8k slave mii";
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| -	bus->read = qca8k_internal_mdio_read;
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| -	bus->write = qca8k_internal_mdio_write;
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| -	snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d",
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| -		 ds->index);
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| -
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|  	bus->parent = ds->dev;
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|  	bus->phy_mask = ~ds->phys_mii_mask;
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| -
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|  	ds->slave_mii_bus = bus;
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|  
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| -	return devm_of_mdiobus_register(priv->dev, bus, mdio);
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| +	/* Check if the devicetree declare the port:phy mapping */
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| +	mdio = of_get_child_by_name(priv->dev->of_node, "mdio");
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| +	if (of_device_is_available(mdio)) {
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| +		snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d", ds->index);
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| +		bus->name = "qca8k slave mii";
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| +		bus->read = qca8k_internal_mdio_read;
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| +		bus->write = qca8k_internal_mdio_write;
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| +		return devm_of_mdiobus_register(priv->dev, bus, mdio);
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| +	}
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| +
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| +	/* If a mapping can't be found the legacy mapping is used,
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| +	 * using the qca8k_port_to_phy function
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| +	 */
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| +	snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d",
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| +		 ds->dst->index, ds->index);
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| +	bus->name = "qca8k-legacy slave mii";
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| +	bus->read = qca8k_legacy_mdio_read;
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| +	bus->write = qca8k_legacy_mdio_write;
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| +	return devm_mdiobus_register(priv->dev, bus);
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|  }
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|  
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|  static int
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|  qca8k_setup_mdio_bus(struct qca8k_priv *priv)
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|  {
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|  	u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg;
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| -	struct device_node *ports, *port, *mdio;
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| +	struct device_node *ports, *port;
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|  	phy_interface_t mode;
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|  	int err;
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|  
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| @@ -1429,24 +1409,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
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|  					 QCA8K_MDIO_MASTER_EN);
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|  	}
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|  
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| -	/* Check if the devicetree declare the port:phy mapping */
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| -	mdio = of_get_child_by_name(priv->dev->of_node, "mdio");
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| -	if (of_device_is_available(mdio)) {
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| -		err = qca8k_mdio_register(priv, mdio);
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| -		if (err)
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| -			of_node_put(mdio);
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| -
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| -		return err;
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| -	}
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| -
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| -	/* If a mapping can't be found the legacy mapping is used,
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| -	 * using the qca8k_port_to_phy function
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| -	 */
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| -	priv->legacy_phy_port_mapping = true;
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| -	priv->ops.phy_read = qca8k_phy_read;
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| -	priv->ops.phy_write = qca8k_phy_write;
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| -
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| -	return 0;
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| +	return qca8k_mdio_register(priv);
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|  }
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|  
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|  static int
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| --- a/drivers/net/dsa/qca8k.h
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| +++ b/drivers/net/dsa/qca8k.h
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| @@ -382,7 +382,6 @@ struct qca8k_priv {
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|  	 * Bit 1: port enabled. Bit 0: port disabled.
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|  	 */
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|  	u8 port_enabled_map;
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| -	bool legacy_phy_port_mapping;
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|  	struct qca8k_ports_config ports_config;
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|  	struct regmap *regmap;
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|  	struct mii_bus *bus;
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