 77a70a0716
			
		
	
	77a70a0716
	
	
	
		
			
			should improve flash access times. Should be harmless to gnerally enable regardless if a flash supporting dual reads is attached. In doubt, spi-nor will just fall back to serial reads. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46725
		
			
				
	
	
		
			69 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
| From 61dc388f577b6f984797949f32c30021d9ea73dc Mon Sep 17 00:00:00 2001
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| From: Jonas Gorski <jogo@openwrt.org>
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| Date: Sun, 23 Aug 2015 12:16:02 +0200
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| Subject: [PATCH V2] spi/bcm63xx-hsspi: add support for dual spi read/write
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| 
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| Add support for dual read/writes on spi-bcm63xx-hsspi. This has been
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| tested with a s25fl129p1 dual read capable spi flash, with a nice speed
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| improvement:
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| 
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| serial read:
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| 
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| root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192
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| 2032+0 records in
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| 2032+0 records out
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| real    0m 4.39s
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| user    0m 0.00s
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| sys     0m 1.55s
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| 
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| dual read:
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| 
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| root@OpenWrt:/# time dd if=/dev/mtd4 of=/dev/null bs=8192
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| 2032+0 records in
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| 2032+0 records out
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| real    0m 3.09s
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| user    0m 0.00s
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| sys     0m 1.56s
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| 
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| Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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| ---
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|  drivers/spi/spi-bcm63xx-hsspi.c | 13 +++++++++----
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|  1 file changed, 9 insertions(+), 4 deletions(-)
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| 
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| --- a/drivers/spi/spi-bcm63xx-hsspi.c
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| +++ b/drivers/spi/spi-bcm63xx-hsspi.c
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| @@ -76,6 +76,7 @@
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|  #define HSSPI_FIFO_REG(x)			(0x200 + (x) * 0x200)
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|  
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|  
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| +#define HSSPI_OP_MULTIBIT			BIT(11)
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|  #define HSSPI_OP_CODE_SHIFT			13
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|  #define HSSPI_OP_SLEEP				(0 << HSSPI_OP_CODE_SHIFT)
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|  #define HSSPI_OP_READ_WRITE			(1 << HSSPI_OP_CODE_SHIFT)
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| @@ -171,9 +172,12 @@ static int bcm63xx_hsspi_do_txrx(struct
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|  	if (opcode != HSSPI_OP_READ)
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|  		step_size -= HSSPI_OPCODE_LEN;
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|  
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| -	__raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT |
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| -		     2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT |
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| -		     2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff,
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| +	if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||
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| +	    (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL))
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| +		opcode |= HSSPI_OP_MULTIBIT;
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| +
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| +	__raw_writel(1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT |
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| +		     1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT | 0xff,
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|  		     bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
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|  
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|  	while (pending > 0) {
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| @@ -374,7 +378,8 @@ static int bcm63xx_hsspi_probe(struct pl
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|  	master->num_chipselect = 8;
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|  	master->setup = bcm63xx_hsspi_setup;
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|  	master->transfer_one_message = bcm63xx_hsspi_transfer_one;
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| -	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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| +	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
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| +			    SPI_RX_DUAL | SPI_TX_DUAL;
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|  	master->bits_per_word_mask = SPI_BPW_MASK(8);
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|  	master->auto_runtime_pm = true;
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|  
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