*Enable SMEM MTD parser and its dependencies (SMEM & HW spinlocks) in the kernel config *Replaces the MTD layout in DT by the dynamic layout provided by the SMEM parser for AP148 Using the OF based parser is still possible on platforms which have a fixed MTD partition layout. Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org> SVN-Revision: 46658
		
			
				
	
	
		
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			80 lines
		
	
	
		
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Content-Type: text/plain; charset="utf-8"
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Subject: [v3,5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform
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From: Archit Taneja <architt@codeaurora.org>
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X-Patchwork-Id: 6927091
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Message-Id: <1438578498-32254-6-git-send-email-architt@codeaurora.org>
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To: linux-mtd@lists.infradead.org, dehrenberg@google.com,
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	cernekee@gmail.com, computersforpeace@gmail.com
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Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org,
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	sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
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	Archit Taneja <architt@codeaurora.org>, devicetree@vger.kernel.org
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Date: Mon,  3 Aug 2015 10:38:18 +0530
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Enable the NAND controller node on the AP148 platform. Provide pinmux
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information.
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Cc: devicetree@vger.kernel.org
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Signed-off-by: Archit Taneja <architt@codeaurora.org>
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---
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arch/arm/boot/dts/qcom-ipq8064-ap148.dts | 36 ++++++++++++++++++++++++++++++++
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 1 file changed, 36 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
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@@ -61,6 +61,31 @@
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 					bias-none;
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 				};
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 			};
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+
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+			nand_pins: nand_pins {
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+				mux {
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+					pins = "gpio34", "gpio35", "gpio36",
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+					       "gpio37", "gpio38", "gpio39",
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+					       "gpio40", "gpio41", "gpio42",
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+					       "gpio43", "gpio44", "gpio45",
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+					       "gpio46", "gpio47";
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+					function = "nand";
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+					drive-strength = <10>;
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+					bias-disable;
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+				};
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+
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+				pullups {
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+					pins = "gpio39";
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+					bias-pull-up;
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+				};
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+
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+				hold {
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+					pins = "gpio40", "gpio41", "gpio42",
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+					       "gpio43", "gpio44", "gpio45",
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+					       "gpio46", "gpio47";
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+					bias-bus-hold;
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+				};
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+			};
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 		};
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 		gsbi@16300000 {
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@@ -147,5 +172,19 @@
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 			pinctrl-0 = <&pcie1_pins>;
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 			pinctrl-names = "default";
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 		};
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+
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+		nand@1ac00000 {
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+			status = "ok";
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+
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+			pinctrl-0 = <&nand_pins>;
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+			pinctrl-names = "default";
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+
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+			nand-ecc-strength = <4>;
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+			nand-bus-width = <8>;
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+		};
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 	};
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 };
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+
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+&adm_dma {
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+	status = "ok";
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+};
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