6be2305da8
Changelog: * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.5 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46598
103 lines
2.6 KiB
Diff
103 lines
2.6 KiB
Diff
From 576701449b01fb0dfaa76bb71f2b94ab5194c1dc Mon Sep 17 00:00:00 2001
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From: Boris BREZILLON <boris.brezillon@free-electrons.com>
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Date: Mon, 28 Jul 2014 14:08:15 +0200
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Subject: [PATCH] ARM: dts: sun7i: Add NAND controller pin definitions
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Define the NAND controller pin configs.
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Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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arch/arm/boot/dts/sun7i-a20.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++
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1 file changed, 80 insertions(+)
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -978,6 +978,86 @@
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allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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};
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+
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+ nand_pins_a: nand_base0@0 {
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+ allwinner,pins = "PC0", "PC1", "PC2",
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+ "PC5", "PC8", "PC9", "PC10",
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+ "PC11", "PC12", "PC13", "PC14",
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+ "PC15", "PC16";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs0_pins_a: nand_cs@0 {
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+ allwinner,pins = "PC4";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs1_pins_a: nand_cs@1 {
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+ allwinner,pins = "PC3";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs2_pins_a: nand_cs@2 {
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+ allwinner,pins = "PC17";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs3_pins_a: nand_cs@3 {
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+ allwinner,pins = "PC18";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs4_pins_a: nand_cs@4 {
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+ allwinner,pins = "PC19";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs5_pins_a: nand_cs@5 {
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+ allwinner,pins = "PC20";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs6_pins_a: nand_cs@6 {
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+ allwinner,pins = "PC21";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_cs7_pins_a: nand_cs@7 {
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+ allwinner,pins = "PC22";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_rb0_pins_a: nand_rb@0 {
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+ allwinner,pins = "PC6";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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+
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+ nand_rb1_pins_a: nand_rb@1 {
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+ allwinner,pins = "PC7";
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+ allwinner,function = "nand0";
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+ allwinner,drive = <0>;
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+ allwinner,pull = <0>;
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+ };
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};
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timer@01c20c00 {
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