92b3efec54
Sort patches according to target/linux/generic/PATCHES. Additionally: - replace hashes in backported patches with the ones from main Linux tree - add descriptions to some patches Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> [remove 004-add_sata_disk_activity_trigger.patch separately] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
124 lines
3.8 KiB
Diff
124 lines
3.8 KiB
Diff
From 5169a9851daaa2782a7bd2bb83d5b1bd224b2879 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
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Date: Thu, 30 Apr 2020 10:06:18 +0200
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Subject: [PATCH] PCI: aardvark: Issue PERST via GPIO
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add support for issuing PERST via GPIO specified in 'reset-gpios'
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property (as described in PCI device tree bindings).
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Some buggy cards (e.g. Compex WLE900VX or WLE1216) are not detected
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after reboot when PERST is not issued during driver initialization.
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If bootloader already enabled link training then issuing PERST has no
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effect for some buggy cards (e.g. Compex WLE900VX) and these cards are
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not detected. We therefore clear the LINK_TRAINING_EN register before.
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It was observed that Compex WLE900VX card needs to be in PERST reset
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for at least 10ms if bootloader enabled link training.
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Tested on Turris MOX.
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Link: https://lore.kernel.org/r/20200430080625.26070-6-pali@kernel.org
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Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
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Signed-off-by: Pali Rohár <pali@kernel.org>
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Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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---
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drivers/pci/controller/pci-aardvark.c | 43 ++++++++++++++++++++++++++-
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1 file changed, 42 insertions(+), 1 deletion(-)
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--- a/drivers/pci/controller/pci-aardvark.c
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+++ b/drivers/pci/controller/pci-aardvark.c
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@@ -9,6 +9,7 @@
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*/
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#include <linux/delay.h>
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+#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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@@ -17,6 +18,7 @@
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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+#include <linux/of_gpio.h>
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#include <linux/of_pci.h>
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#include "../pci.h"
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@@ -204,6 +206,7 @@ struct advk_pcie {
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int root_bus_nr;
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int link_gen;
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struct pci_bridge_emul bridge;
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+ struct gpio_desc *reset_gpio;
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};
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static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
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@@ -330,10 +333,31 @@ err:
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dev_err(dev, "link never came up\n");
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}
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+static void advk_pcie_issue_perst(struct advk_pcie *pcie)
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+{
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+ u32 reg;
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+
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+ if (!pcie->reset_gpio)
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+ return;
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+
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+ /* PERST does not work for some cards when link training is enabled */
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+ reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
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+ reg &= ~LINK_TRAINING_EN;
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+ advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
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+
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+ /* 10ms delay is needed for some cards */
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+ dev_info(&pcie->pdev->dev, "issuing PERST via reset GPIO for 10ms\n");
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+ gpiod_set_value_cansleep(pcie->reset_gpio, 1);
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+ usleep_range(10000, 11000);
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+ gpiod_set_value_cansleep(pcie->reset_gpio, 0);
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+}
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+
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static void advk_pcie_setup_hw(struct advk_pcie *pcie)
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{
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u32 reg;
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+ advk_pcie_issue_perst(pcie);
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+
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/* Set to Direct mode */
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reg = advk_readl(pcie, CTRL_CONFIG_REG);
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reg &= ~(CTRL_MODE_MASK << CTRL_MODE_SHIFT);
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@@ -406,7 +430,8 @@ static void advk_pcie_setup_hw(struct ad
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/*
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* PERST# signal could have been asserted by pinctrl subsystem before
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- * probe() callback has been called, making the endpoint going into
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+ * probe() callback has been called or issued explicitly by reset gpio
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+ * function advk_pcie_issue_perst(), making the endpoint going into
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* fundamental reset. As required by PCI Express spec a delay for at
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* least 100ms after such a reset before link training is needed.
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*/
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@@ -1093,6 +1118,22 @@ static int advk_pcie_probe(struct platfo
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return ret;
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}
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+ pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node,
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+ "reset-gpios", 0,
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+ GPIOD_OUT_LOW,
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+ "pcie1-reset");
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+ ret = PTR_ERR_OR_ZERO(pcie->reset_gpio);
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+ if (ret) {
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+ if (ret == -ENOENT) {
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+ pcie->reset_gpio = NULL;
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+ } else {
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+ if (ret != -EPROBE_DEFER)
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+ dev_err(dev, "Failed to get reset-gpio: %i\n",
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+ ret);
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+ return ret;
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+ }
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+ }
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+
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ret = of_pci_get_max_link_speed(dev->of_node);
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if (ret <= 0 || ret > 3)
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pcie->link_gen = 3;
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