109 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			109 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From b11df0c9efbbe2b52c5133ca15030f01b43ec6ef Mon Sep 17 00:00:00 2001
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From: Al Cooper <alcooperx@gmail.com>
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Date: Fri, 3 Jan 2020 13:18:04 -0500
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Subject: [PATCH] dt-bindings: Add Broadcom STB USB PHY binding document
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Add support for bcm7216 and bcm7211
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Signed-off-by: Al Cooper <alcooperx@gmail.com>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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---
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 .../bindings/phy/brcm,brcmstb-usb-phy.txt     | 69 +++++++++++++++----
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 1 file changed, 56 insertions(+), 13 deletions(-)
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--- a/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt
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+++ b/Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.txt
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@@ -1,30 +1,49 @@
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 Broadcom STB USB PHY
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 Required properties:
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- - compatible: brcm,brcmstb-usb-phy
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- - reg: two offset and length pairs.
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-	The first pair specifies a manditory set of memory mapped
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-	registers used for general control of the PHY.
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-	The second pair specifies optional registers used by some of
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-	the SoCs that support USB 3.x
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- - #phy-cells: Shall be 1 as it expects one argument for setting
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-	       the type of the PHY. Possible values are:
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-	       - PHY_TYPE_USB2 for USB1.1/2.0 PHY
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-	       - PHY_TYPE_USB3 for USB3.x PHY
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+- compatible: should be one of
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+	"brcm,brcmstb-usb-phy"
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+	"brcm,bcm7216-usb-phy"
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+	"brcm,bcm7211-usb-phy"
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+
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+- reg and reg-names properties requirements are specific to the
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+  compatible string.
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+  "brcm,brcmstb-usb-phy":
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+    - reg: 1 or 2 offset and length pairs. One for the base CTRL registers
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+           and an optional pair for systems with USB 3.x support
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+    - reg-names: not specified
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+  "brcm,bcm7216-usb-phy":
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+    - reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL
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+           registers
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+    - reg-names: "ctrl", "xhci_ec", "xhci_gbl"
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+  "brcm,bcm7211-usb-phy":
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+    - reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL,
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+           USB_PHY and USB_MDIO registers and an optional pair
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+	   for the BDC registers
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+    - reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
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+
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+- #phy-cells: Shall be 1 as it expects one argument for setting
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+	      the type of the PHY. Possible values are:
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+	      - PHY_TYPE_USB2 for USB1.1/2.0 PHY
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+	      - PHY_TYPE_USB3 for USB3.x PHY
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 Optional Properties:
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 - clocks : clock phandles.
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 - clock-names: String, clock name.
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+- interrupts: wakeup interrupt
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+- interrupt-names: "wakeup"
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 - brcm,ipp: Boolean, Invert Port Power.
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   Possible values are: 0 (Don't invert), 1 (Invert)
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 - brcm,ioc: Boolean, Invert Over Current detection.
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   Possible values are: 0 (Don't invert), 1 (Invert)
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-NOTE: one or both of the following two properties must be set
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-- brcm,has-xhci: Boolean indicating the phy has an XHCI phy.
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-- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy.
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 - dr_mode: String, PHY Device mode.
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   Possible values are: "host", "peripheral ", "drd" or "typec-pd"
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   If this property is not defined, the phy will default to "host" mode.
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+- brcm,syscon-piarbctl: phandle to syscon for handling config registers
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+NOTE: one or both of the following two properties must be set
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+- brcm,has-xhci: Boolean indicating the phy has an XHCI phy.
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+- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy.
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+
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 Example:
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@@ -41,3 +60,27 @@ usbphy_0: usb-phy@f0470200 {
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 	clocks = <&usb20>, <&usb30>;
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 	clock-names = "sw_usb", "sw_usb3";
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 };
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+
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+usb-phy@29f0200 {
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+	reg = <0x29f0200 0x200>,
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+		<0x29c0880 0x30>,
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+		<0x29cc100 0x534>,
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+		<0x2808000 0x24>,
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+		<0x2980080 0x8>;
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+	reg-names = "ctrl",
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+		"xhci_ec",
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+		"xhci_gbl",
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+		"usb_phy",
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+		"usb_mdio";
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+	brcm,ioc = <0x0>;
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+	brcm,ipp = <0x0>;
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+	compatible = "brcm,bcm7211-usb-phy";
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+	interrupts = <0x30>;
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+	interrupt-parent = <&vpu_intr1_nosec_intc>;
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+	interrupt-names = "wake";
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+	#phy-cells = <0x1>;
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+	brcm,has-xhci;
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+	syscon-piarbctl = <&syscon_piarbctl>;
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+	clocks = <&scmi_clk 256>;
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+	clock-names = "sw_usb";
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+};
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