All modification made by update_kernel.sh in a fresh clone without
existing toolchains.
Build system:       x86_64
Build-tested:       ipq806x/R7800, bcm27xx/bcm2711
Run-tested:         ipq806x/R7800
Compile-tested [*]: ath79/{tiny,generic}, ipq40xx, octeon,
                    ramips/mt7621, realtek, x86/64
Run-tested [*]:     ath79/generic, ipq40xx, octeon, ramips/mt7621
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Tested-by: Stijn Segers <foss@volatilesystems.org> [*]
		
	
		
			
				
	
	
		
			61 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			61 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From 67ca04147efac6cac3f7490c61c817a84daada57 Mon Sep 17 00:00:00 2001
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From: Yangbo Lu <yangbo.lu@nxp.com>
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Date: Thu, 28 Nov 2019 14:42:44 +0800
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Subject: [PATCH] LF-368 net: mscc: ocelot: add VCAP IS2 rule to trap PTP
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 Ethernet frames
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All the PTP messages over Ethernet have etype 0x88f7 on them.
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Use etype as the key to trap PTP messages.
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Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
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---
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 drivers/net/ethernet/mscc/ocelot.c | 23 +++++++++++++++++++++++
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 1 file changed, 23 insertions(+)
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--- a/drivers/net/ethernet/mscc/ocelot.c
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+++ b/drivers/net/ethernet/mscc/ocelot.c
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@@ -2340,6 +2340,20 @@ void ocelot_set_cpu_port(struct ocelot *
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 }
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 EXPORT_SYMBOL(ocelot_set_cpu_port);
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+/* Entry for PTP over Ethernet (etype 0x88f7)
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+ * Action: trap to CPU port
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+ */
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+static struct ocelot_ace_rule ptp_rule = {
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+	.prio		= 1,
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+	.type		= OCELOT_ACE_TYPE_ETYPE,
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+	.dmac_mc	= OCELOT_VCAP_BIT_1,
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+	.action		= OCELOT_ACL_ACTION_TRAP,
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+	.frame.etype.etype.value[0]	= 0x88,
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+	.frame.etype.etype.value[1]	= 0xf7,
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+	.frame.etype.etype.mask[0]	= 0xff,
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+	.frame.etype.etype.mask[1]	= 0xff,
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+};
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+
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 int ocelot_init(struct ocelot *ocelot)
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 {
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 	char queue_name[32];
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@@ -2477,6 +2491,13 @@ int ocelot_init(struct ocelot *ocelot)
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 				"Timestamp initialization failed\n");
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 			return ret;
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 		}
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+
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+		/* Available on all ingress port except CPU port */
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+		ptp_rule.ocelot = ocelot;
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+		ptp_rule.ingress_port_mask =
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+			GENMASK(ocelot->num_phys_ports - 1, 0);
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+		ptp_rule.ingress_port_mask &= ~BIT(ocelot->cpu);
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+		ocelot_ace_rule_offload_add(&ptp_rule);
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 	}
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 	return 0;
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@@ -2491,6 +2512,8 @@ void ocelot_deinit(struct ocelot *ocelot
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 	cancel_delayed_work(&ocelot->stats_work);
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 	destroy_workqueue(ocelot->stats_queue);
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 	mutex_destroy(&ocelot->stats_lock);
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+	if (ocelot->ptp)
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+		ocelot_ace_rule_offload_del(&ptp_rule);
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 	ocelot_ace_deinit();
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 	if (ocelot->ptp_clock)
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 		ptp_clock_unregister(ocelot->ptp_clock);
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