74d00a8c38
* properly format/comment all patches * merge debloat patches * merge Kconfig patches * merge swconfig patches * merge hotplug patches * drop 200-fix_localversion.patch - upstream * drop 222-arm_zimage_none.patch - unused * drop 252-mv_cesa_depends.patch - no longer required * drop 410-mtd-move-forward-declaration-of-struct-mtd_info.patch - unused * drop 661-fq_codel_keep_dropped_stats.patch - outdated * drop 702-phy_add_aneg_done_function.patch - upstream * drop 840-rtc7301.patch - unused * drop 841-rtc_pt7c4338.patch - upstream * drop 921-use_preinit_as_init.patch - unused * drop spio-gpio-old and gpio-mmc - unused Signed-off-by: John Crispin <john@phrozen.org>
177 lines
5.6 KiB
Diff
177 lines
5.6 KiB
Diff
From: Jon Mason <jon.mason@broadcom.com>
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Date: Fri, 4 Nov 2016 01:10:58 -0400
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Subject: [PATCH] net: phy: broadcom: Add BCM54810 PHY entry
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The BCM54810 PHY requires some semi-unique configuration, which results
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in some additional configuration in addition to the standard config.
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Also, some users of the BCM54810 require the PHY lanes to be swapped.
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Since there is no way to detect this, add a device tree query to see if
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it is applicable.
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Inspired-by: Vikas Soni <vsoni@broadcom.com>
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Signed-off-by: Jon Mason <jon.mason@broadcom.com>
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/net/phy/broadcom.c
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+++ b/drivers/net/phy/broadcom.c
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@@ -18,7 +18,7 @@
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#include <linux/module.h>
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#include <linux/phy.h>
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#include <linux/brcmphy.h>
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-
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+#include <linux/of.h>
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#define BRCM_PHY_MODEL(phydev) \
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((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask)
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@@ -45,6 +45,34 @@ static int bcm54xx_auxctl_write(struct p
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return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val);
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}
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+static int bcm54810_config(struct phy_device *phydev)
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+{
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+ int rc, val;
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+
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+ val = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL);
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+ val &= ~BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN;
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+ rc = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL,
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+ val);
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+ if (rc < 0)
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+ return rc;
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+
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+ val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
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+ val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN;
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+ val |= MII_BCM54XX_AUXCTL_MISC_WREN;
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+ rc = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
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+ val);
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+ if (rc < 0)
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+ return rc;
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+
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+ val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL);
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+ val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN;
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+ rc = bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val);
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+ if (rc < 0)
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+ return rc;
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+
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+ return 0;
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+}
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+
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/* Needs SMDSP clock enabled via bcm54xx_phydsp_config() */
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static int bcm50610_a0_workaround(struct phy_device *phydev)
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{
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@@ -217,6 +245,12 @@ static int bcm54xx_config_init(struct ph
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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bcm54xx_adjust_rxrefclk(phydev);
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+ if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810) {
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+ err = bcm54810_config(phydev);
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+ if (err)
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+ return err;
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+ }
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+
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bcm54xx_phydsp_config(phydev);
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return 0;
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@@ -314,6 +348,7 @@ static int bcm5482_read_status(struct ph
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static int bcm5481_config_aneg(struct phy_device *phydev)
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{
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+ struct device_node *np = phydev->mdio.dev.of_node;
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int ret;
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/* Aneg firsly. */
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@@ -344,6 +379,14 @@ static int bcm5481_config_aneg(struct ph
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phy_write(phydev, 0x18, reg);
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}
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+ if (of_property_read_bool(np, "enet-phy-lane-swap")) {
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+ /* Lane Swap - Undocumented register...magic! */
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+ ret = bcm_phy_write_exp(phydev, MII_BCM54XX_EXP_SEL_ER + 0x9,
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+ 0x11B);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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return ret;
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}
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@@ -578,6 +621,18 @@ static struct phy_driver broadcom_driver
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.ack_interrupt = bcm_phy_ack_intr,
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.config_intr = bcm_phy_config_intr,
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}, {
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+ .phy_id = PHY_ID_BCM54810,
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+ .phy_id_mask = 0xfffffff0,
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+ .name = "Broadcom BCM54810",
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+ .features = PHY_GBIT_FEATURES |
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+ SUPPORTED_Pause | SUPPORTED_Asym_Pause,
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+ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
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+ .config_init = bcm54xx_config_init,
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+ .config_aneg = bcm5481_config_aneg,
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+ .read_status = genphy_read_status,
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+ .ack_interrupt = bcm_phy_ack_intr,
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+ .config_intr = bcm_phy_config_intr,
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+}, {
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.phy_id = PHY_ID_BCM5482,
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.phy_id_mask = 0xfffffff0,
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.name = "Broadcom BCM5482",
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@@ -661,6 +716,7 @@ static struct mdio_device_id __maybe_unu
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{ PHY_ID_BCM54616S, 0xfffffff0 },
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{ PHY_ID_BCM5464, 0xfffffff0 },
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{ PHY_ID_BCM5481, 0xfffffff0 },
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+ { PHY_ID_BCM54810, 0xfffffff0 },
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{ PHY_ID_BCM5482, 0xfffffff0 },
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{ PHY_ID_BCM50610, 0xfffffff0 },
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{ PHY_ID_BCM50610M, 0xfffffff0 },
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--- a/drivers/net/phy/Kconfig
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+++ b/drivers/net/phy/Kconfig
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@@ -204,7 +204,7 @@ config BROADCOM_PHY
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select BCM_NET_PHYLIB
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---help---
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Currently supports the BCM5411, BCM5421, BCM5461, BCM54616S, BCM5464,
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- BCM5481 and BCM5482 PHYs.
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+ BCM5481, BCM54810 and BCM5482 PHYs.
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config CICADA_PHY
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tristate "Cicada PHYs"
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--- a/include/linux/brcmphy.h
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+++ b/include/linux/brcmphy.h
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@@ -13,6 +13,7 @@
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#define PHY_ID_BCM5241 0x0143bc30
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#define PHY_ID_BCMAC131 0x0143bc70
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#define PHY_ID_BCM5481 0x0143bca0
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+#define PHY_ID_BCM54810 0x03625d00
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#define PHY_ID_BCM5482 0x0143bcb0
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#define PHY_ID_BCM5411 0x00206070
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#define PHY_ID_BCM5421 0x002060e0
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@@ -56,6 +57,7 @@
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#define PHY_BRCM_EXT_IBND_TX_ENABLE 0x00002000
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#define PHY_BRCM_CLEAR_RGMII_MODE 0x00004000
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#define PHY_BRCM_DIS_TXCRXC_NOENRGY 0x00008000
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+
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/* Broadcom BCM7xxx specific workarounds */
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#define PHY_BRCM_7XXX_REV(x) (((x) >> 8) & 0xff)
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#define PHY_BRCM_7XXX_PATCH(x) ((x) & 0xff)
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@@ -111,6 +113,7 @@
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#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000
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#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007
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#define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT 12
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+#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN (1 << 8)
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#define MII_BCM54XX_AUXCTL_SHDWSEL_MASK 0x0007
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@@ -192,6 +195,12 @@
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#define BCM5482_SSD_SGMII_SLAVE_EN 0x0002 /* Slave mode enable */
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#define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */
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+/* BCM54810 Registers */
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+#define BCM54810_EXP_BROADREACH_LRE_MISC_CTL (MII_BCM54XX_EXP_SEL_ER + 0x90)
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+#define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN (1 << 0)
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+#define BCM54810_SHD_CLK_CTL 0x3
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+#define BCM54810_SHD_CLK_CTL_GTXCLK_EN (1 << 9)
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+
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/*****************************************************************************/
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/* Fast Ethernet Transceiver definitions. */
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