3d5c5427e1
Support for MT7981 and MT7986 has been merged, remove patches. Tested on a couple of MT7986, MT7622 and MT7623 boards. MIPS builds are untested. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
143 lines
3.7 KiB
Diff
143 lines
3.7 KiB
Diff
From c4172a95df8a57a66c70a8b9948b9600a01c4cb7 Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Mon, 25 Jul 2022 11:32:08 +0800
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Subject: [PATCH 49/71] mtd: spi-nor: add support to read flash unique ID
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This patch adds support to read unique ID from spi-nor flashes.
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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drivers/mtd/spi/spi-nor-core.c | 95 ++++++++++++++++++++++++++++++++++
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include/linux/mtd/spi-nor.h | 2 +
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2 files changed, 97 insertions(+)
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--- a/drivers/mtd/spi/spi-nor-core.c
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+++ b/drivers/mtd/spi/spi-nor-core.c
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@@ -2818,6 +2818,100 @@ static int spi_nor_init_params(struct sp
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return 0;
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}
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+static int spi_nor_read_uuid(struct spi_nor *nor)
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+{
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+ u8 read_opcode, addr_width, read_dummy;
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+ loff_t addr;
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+ u8 *uuid;
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+ u8 uuid_len;
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+ int shift = 0;
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+ int ret;
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+ int i;
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+ struct spi_mem_op op;
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+
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+ read_opcode = nor->read_opcode;
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+ addr_width = nor->addr_width;
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+ read_dummy = nor->read_dummy;
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+
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+ switch (JEDEC_MFR(nor->info)) {
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+ case SNOR_MFR_WINBOND:
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+ uuid_len = 8;
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+ nor->read_opcode = 0x4b;
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+ nor->addr_width = 0;
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+ addr = 0x0;
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+ nor->read_dummy = 4;
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+ break;
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+ case SNOR_MFR_GIGADEVICE:
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+ uuid_len = 16;
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+ nor->read_opcode = 0x4b;
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+ nor->addr_width = 3;
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+ addr = 0x0;
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+ nor->read_dummy = 1;
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+ break;
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+ case CFI_MFR_ST:
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+ case SNOR_MFR_MICRON:
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+ uuid_len = 17;
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+ shift = 3;
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+ nor->read_opcode = 0x9f;
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+ nor->addr_width = 0;
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+ addr = 0x0;
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+ nor->read_dummy = 0;
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+ break;
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+ case SNOR_MFR_EON:
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+ uuid_len = 12;
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+ nor->read_opcode = 0x5a;
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+ nor->addr_width = 3;
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+ addr = 0x80;
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+ nor->read_dummy = 1;
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+ break;
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+ /* Automotive only in SPANSION's NOR devices */
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+ case SNOR_MFR_SPANSION:
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+ uuid_len = 11;
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+ shift = 386;
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+ nor->read_opcode = 0x9f;
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+ nor->addr_width = 0;
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+ addr = 0x0;
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+ nor->read_dummy = 0;
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+ break;
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+ default:
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+ printf("UUID not supported on this device.\n");
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+ return -ENOTSUPP;
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+ }
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+
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+ uuid = kmalloc((uuid_len + shift) * sizeof(*uuid), GFP_KERNEL);
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+ if (!uuid) {
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+ ret = -ENOMEM;
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+ goto read_err;
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+ }
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+ memset(uuid, 0x0, (uuid_len + shift) * sizeof(*uuid));
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+
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+ op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(nor->read_opcode, 0),
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+ SPI_MEM_OP_ADDR(nor->addr_width, addr, 0),
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+ SPI_MEM_OP_DUMMY(nor->read_dummy, 0),
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+ SPI_MEM_OP_DATA_IN(uuid_len+shift, NULL, 0));
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+
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+ spi_nor_setup_op(nor, &op, nor->reg_proto);
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+
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+ ret = spi_nor_read_write_reg(nor, &op, uuid);
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+ if (ret < 0) {
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+ dev_dbg(nor->dev, "error %d reading %x\n", ret, nor->read_opcode);
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+ goto read_err;
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+ }
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+
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+ printf("UUID: 0x");
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+ for(i = 0; i<uuid_len; i++)
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+ printf("%02x", uuid[i+shift]);
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+ puts("\n");
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+
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+read_err:
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+ nor->read_opcode = read_opcode;
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+ nor->addr_width = addr_width;
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+ nor->read_dummy = read_dummy;
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+ kfree(uuid);
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+
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+ return ret;
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+}
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+
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static int spi_nor_hwcaps2cmd(u32 hwcaps, const int table[][2], size_t size)
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{
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size_t i;
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@@ -3901,6 +3995,7 @@ int spi_nor_scan(struct spi_nor *nor)
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nor->write = spi_nor_write_data;
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nor->read_reg = spi_nor_read_reg;
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nor->write_reg = spi_nor_write_reg;
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+ nor->read_uuid = spi_nor_read_uuid;
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nor->setup = spi_nor_default_setup;
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--- a/include/linux/mtd/spi-nor.h
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+++ b/include/linux/mtd/spi-nor.h
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@@ -29,6 +29,7 @@
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#define SNOR_MFR_SPANSION CFI_MFR_AMD
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#define SNOR_MFR_SST CFI_MFR_SST
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#define SNOR_MFR_WINBOND 0xef /* Also used by some Spansion */
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+#define SNOR_MFR_EON CFI_MFR_EON
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#define SNOR_MFR_CYPRESS 0x34
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/*
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@@ -565,6 +566,7 @@ struct spi_nor {
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void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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+ int (*read_uuid)(struct spi_nor *nor);
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ssize_t (*read)(struct spi_nor *nor, loff_t from,
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size_t len, u_char *read_buf);
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