f2f42a54e8
The qca8k patch series brings the numbering to 799. This patch renames 7xx patches to create space for more backports to be added. Signed-off-by: Matthew Hagan <mnhagan88@gmail.com> [rename 729->719] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
129 lines
3.7 KiB
Diff
129 lines
3.7 KiB
Diff
From 60df02b6ea4581d72eb7a3ab7204504a54059b72 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Fri, 14 May 2021 23:00:08 +0200
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Subject: [PATCH] net: dsa: qca8k: dsa: qca8k: protect MASTER busy_wait with
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mdio mutex
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MDIO_MASTER operation have a dedicated busy wait that is not protected
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by the mdio mutex. This can cause situation where the MASTER operation
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is done and a normal operation is executed between the MASTER read/write
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and the MASTER busy_wait. Rework the qca8k_mdio_read/write function to
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address this issue by binding the lock for the whole MASTER operation
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and not only the mdio read/write common operation.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/qca8k.c | 68 +++++++++++++++++++++++++++++++++--------
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1 file changed, 55 insertions(+), 13 deletions(-)
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--- a/drivers/net/dsa/qca8k.c
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+++ b/drivers/net/dsa/qca8k.c
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@@ -628,8 +628,31 @@ qca8k_port_to_phy(int port)
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}
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static int
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+qca8k_mdio_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask)
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+{
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+ u16 r1, r2, page;
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+ u32 val;
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+ int ret;
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+
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+ qca8k_split_addr(reg, &r1, &r2, &page);
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+
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+ ret = read_poll_timeout(qca8k_mii_read32, val, !(val & mask), 0,
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+ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false,
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+ priv->bus, 0x10 | r2, r1);
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+
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+ /* Check if qca8k_read has failed for a different reason
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+ * before returnting -ETIMEDOUT
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+ */
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+ if (ret < 0 && val < 0)
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+ return val;
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+
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+ return ret;
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+}
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+
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+static int
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qca8k_mdio_write(struct qca8k_priv *priv, int port, u32 regnum, u16 data)
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{
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+ u16 r1, r2, page;
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u32 phy, val;
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int ret;
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@@ -645,12 +668,21 @@ qca8k_mdio_write(struct qca8k_priv *priv
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QCA8K_MDIO_MASTER_REG_ADDR(regnum) |
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QCA8K_MDIO_MASTER_DATA(data);
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- ret = qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val);
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+ qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page);
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+
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+ mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED);
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+
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+ ret = qca8k_set_page(priv->bus, page);
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if (ret)
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- return ret;
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+ goto exit;
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+
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+ qca8k_mii_write32(priv->bus, 0x10 | r2, r1, val);
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- ret = qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL,
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- QCA8K_MDIO_MASTER_BUSY);
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+ ret = qca8k_mdio_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL,
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+ QCA8K_MDIO_MASTER_BUSY);
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+
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+exit:
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+ mutex_unlock(&priv->bus->mdio_lock);
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/* even if the busy_wait timeouts try to clear the MASTER_EN */
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qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL,
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@@ -662,6 +694,7 @@ qca8k_mdio_write(struct qca8k_priv *priv
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static int
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qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum)
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{
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+ u16 r1, r2, page;
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u32 phy, val;
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int ret;
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@@ -676,21 +709,30 @@ qca8k_mdio_read(struct qca8k_priv *priv,
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QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) |
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QCA8K_MDIO_MASTER_REG_ADDR(regnum);
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- ret = qca8k_write(priv, QCA8K_MDIO_MASTER_CTRL, val);
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- if (ret)
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- return ret;
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+ qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page);
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+
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+ mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED);
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- ret = qca8k_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL,
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- QCA8K_MDIO_MASTER_BUSY);
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+ ret = qca8k_set_page(priv->bus, page);
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if (ret)
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- return ret;
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+ goto exit;
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- val = qca8k_read(priv, QCA8K_MDIO_MASTER_CTRL);
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- if (val < 0)
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- return val;
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+ qca8k_mii_write32(priv->bus, 0x10 | r2, r1, val);
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+
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+ ret = qca8k_mdio_busy_wait(priv, QCA8K_MDIO_MASTER_CTRL,
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+ QCA8K_MDIO_MASTER_BUSY);
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+ if (ret)
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+ goto exit;
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+ val = qca8k_mii_read32(priv->bus, 0x10 | r2, r1);
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val &= QCA8K_MDIO_MASTER_DATA_MASK;
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+exit:
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+ mutex_unlock(&priv->bus->mdio_lock);
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+
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+ if (val >= 0)
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+ val &= QCA8K_MDIO_MASTER_DATA_MASK;
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+
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/* even if the busy_wait timeouts try to clear the MASTER_EN */
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qca8k_reg_clear(priv, QCA8K_MDIO_MASTER_CTRL,
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QCA8K_MDIO_MASTER_EN);
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