a15ccc2fe0
IPQESS is the EDMA replacement driver for the IPQ40xx SoC built-in ethernet controller. Unlike EDMA it is Phylink based and doesnt touch PHY-s directly. Signed-off-by: Robert Marko <robert.marko@sartura.hr>
82 lines
2.6 KiB
Diff
82 lines
2.6 KiB
Diff
From 44327d7098d4f32c24ec8c528e5aff6e030956bc Mon Sep 17 00:00:00 2001
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From: Robert Marko <robert.marko@sartura.hr>
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Date: Wed, 20 Oct 2021 13:21:45 +0200
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Subject: [PATCH] arm: dts: ipq4019: add ethernet controller DT node
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Since IPQ40xx SoC built-in ethernet controller now has a driver,
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add its DT node so it can be used.
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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---
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 48 +++++++++++++++++++++++++++++
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1 file changed, 48 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -38,6 +38,7 @@
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spi1 = &blsp1_spi2;
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i2c0 = &blsp1_i2c3;
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i2c1 = &blsp1_i2c4;
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+ ethernet0 = &gmac;
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};
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cpus {
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@@ -589,6 +590,57 @@
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status = "disabled";
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};
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+ gmac: ethernet@c080000 {
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+ compatible = "qcom,ipq4019-ess-edma";
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+ reg = <0xc080000 0x8000>;
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+ resets = <&gcc ESS_RESET>;
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+ reset-names = "ess_rst";
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+ clocks = <&gcc GCC_ESS_CLK>;
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+ clock-names = "ess_clk";
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+ interrupts = <GIC_SPI 65 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 69 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 71 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 72 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 76 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 240 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 242 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 243 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 244 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 245 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 246 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 249 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 250 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 251 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 252 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 253 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 254 IRQ_TYPE_EDGE_RISING>,
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+ <GIC_SPI 255 IRQ_TYPE_EDGE_RISING>;
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+
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+ status = "disabled";
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+
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+ phy-mode = "internal";
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+ fixed-link {
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+ speed = <1000>;
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+ full-duplex;
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+ pause;
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+ asym-pause;
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+ };
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+ };
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+
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mdio: mdio@90000 {
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#address-cells = <1>;
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#size-cells = <0>;
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