9b4041fa2e
Run `make target/linux/refresh` to align patches with OpenWrt style. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
72 lines
2.8 KiB
Diff
72 lines
2.8 KiB
Diff
From 3e45577e70cbf8fdc5c13033114989794a3797d5 Mon Sep 17 00:00:00 2001
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From: Miquel Raynal <miquel.raynal@bootlin.com>
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Date: Thu, 27 Jan 2022 10:17:56 +0100
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Subject: [PATCH 04/15] spi: spi-mem: Introduce a capability structure
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Create a spi_controller_mem_caps structure and put it within the
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spi_controller structure close to the spi_controller_mem_ops
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strucure. So far the only field in this structure is the support for dtr
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operations, but soon we will add another parameter.
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Also create a helper to parse the capabilities and check if the
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requested capability has been set or not.
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
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Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
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Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
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Reviewed-by: Mark Brown <broonie@kernel.org>
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Link: https://lore.kernel.org/linux-mtd/20220127091808.1043392-2-miquel.raynal@bootlin.com
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(cherry picked from commit 4a3cc7fb6e63bcfdedec25364738f1493345bd20)
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---
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include/linux/spi/spi-mem.h | 11 +++++++++++
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include/linux/spi/spi.h | 3 +++
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2 files changed, 14 insertions(+)
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--- a/include/linux/spi/spi-mem.h
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+++ b/include/linux/spi/spi-mem.h
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@@ -286,6 +286,17 @@ struct spi_controller_mem_ops {
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};
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/**
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+ * struct spi_controller_mem_caps - SPI memory controller capabilities
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+ * @dtr: Supports DTR operations
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+ */
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+struct spi_controller_mem_caps {
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+ bool dtr;
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+};
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+
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+#define spi_mem_controller_is_capable(ctlr, cap) \
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+ ((ctlr)->mem_caps && (ctlr)->mem_caps->cap)
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+
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+/**
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* struct spi_mem_driver - SPI memory driver
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* @spidrv: inherit from a SPI driver
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* @probe: probe a SPI memory. Usually where detection/initialization takes
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--- a/include/linux/spi/spi.h
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+++ b/include/linux/spi/spi.h
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@@ -23,6 +23,7 @@ struct software_node;
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struct spi_controller;
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struct spi_transfer;
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struct spi_controller_mem_ops;
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+struct spi_controller_mem_caps;
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/*
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* INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
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@@ -419,6 +420,7 @@ extern struct spi_device *spi_new_ancill
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* @mem_ops: optimized/dedicated operations for interactions with SPI memory.
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* This field is optional and should only be implemented if the
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* controller has native support for memory like operations.
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+ * @mem_caps: controller capabilities for the handling of memory operations.
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* @unprepare_message: undo any work done by prepare_message().
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* @slave_abort: abort the ongoing transfer request on an SPI slave controller
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* @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
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@@ -643,6 +645,7 @@ struct spi_controller {
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/* Optimized handlers for SPI memory-like operations. */
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const struct spi_controller_mem_ops *mem_ops;
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+ const struct spi_controller_mem_caps *mem_caps;
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/* gpio chip select */
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int *cs_gpios;
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