Removed upstreamed: generic/pending-5.15/722-net-mt7531-only-do-PLL-once-after-the-reset.patch[1] bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch[2] All other patches automatically rebased Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 Run-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 (RB5009UG+S+IN) 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=5de02ab84aeca765da0e4d8e999af35325ac67c2 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=ab5c5787ab5ecdc4a7ea20b4ef542579e1beb49d Signed-off-by: John Audia <therealgraysky@proton.me>
		
			
				
	
	
		
			386 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
			
		
		
	
	
			386 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			Diff
		
	
	
	
	
	
From fd993fd59d96d5e2d5972ec4ca1f9651025c987b Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Mon, 11 Apr 2022 10:46:27 +0100
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Subject: [PATCH 07/13] net: dsa: mt7530: partially convert to phylink_pcs
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Partially convert the mt7530 driver to use phylink's PCS support. This
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is a partial implementation as we don't move anything into the
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pcs_config method yet - this driver supports SGMII or 1000BASE-X
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without in-band.
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Tested-by: Marek Behún <kabel@kernel.org>
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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 drivers/net/dsa/mt7530.c | 144 +++++++++++++++++++++++----------------
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 drivers/net/dsa/mt7530.h |  21 +++---
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 2 files changed, 95 insertions(+), 70 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -24,6 +24,11 @@
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 #include "mt7530.h"
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+static struct mt753x_pcs *pcs_to_mt753x_pcs(struct phylink_pcs *pcs)
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+{
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+	return container_of(pcs, struct mt753x_pcs, pcs);
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+}
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+
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 /* String, offset, and register size in bytes if different from 4 bytes */
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 static const struct mt7530_mib_desc mt7530_mib[] = {
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 	MIB_DESC(1, 0x00, "TxDrop"),
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@@ -2522,12 +2527,11 @@ static int mt7531_rgmii_setup(struct mt7
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 	return 0;
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 }
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-static void
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-mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
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-			   unsigned int mode, phy_interface_t interface,
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-			   int speed, int duplex)
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+static void mt7531_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
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+			       phy_interface_t interface, int speed, int duplex)
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 {
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-	struct mt7530_priv *priv = ds->priv;
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+	struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
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+	int port = pcs_to_mt753x_pcs(pcs)->port;
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 	unsigned int val;
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 	/* For adjusting speed and duplex of SGMII force mode. */
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@@ -2553,6 +2557,9 @@ mt7531_sgmii_link_up_force(struct dsa_sw
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 	/* MT7531 SGMII 1G force mode can only work in full duplex mode,
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 	 * no matter MT7531_SGMII_FORCE_HALF_DUPLEX is set or not.
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+	 *
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+	 * The speed check is unnecessary as the MAC capabilities apply
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+	 * this restriction. --rmk
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 	 */
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 	if ((speed == SPEED_10 || speed == SPEED_100) &&
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 	    duplex != DUPLEX_FULL)
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@@ -2628,9 +2635,10 @@ static int mt7531_sgmii_setup_mode_an(st
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 	return 0;
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 }
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-static void mt7531_sgmii_restart_an(struct dsa_switch *ds, int port)
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+static void mt7531_pcs_an_restart(struct phylink_pcs *pcs)
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 {
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-	struct mt7530_priv *priv = ds->priv;
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+	struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
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+	int port = pcs_to_mt753x_pcs(pcs)->port;
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 	u32 val;
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 	/* Only restart AN when AN is enabled */
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@@ -2687,6 +2695,24 @@ mt753x_mac_config(struct dsa_switch *ds,
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 	return priv->info->mac_port_config(ds, port, mode, state->interface);
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 }
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+static struct phylink_pcs *
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+mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port,
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+			      phy_interface_t interface)
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+{
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+	struct mt7530_priv *priv = ds->priv;
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+
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+	switch (interface) {
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+	case PHY_INTERFACE_MODE_TRGMII:
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+	case PHY_INTERFACE_MODE_SGMII:
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+	case PHY_INTERFACE_MODE_1000BASEX:
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+	case PHY_INTERFACE_MODE_2500BASEX:
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+		return &priv->pcs[port].pcs;
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+
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+	default:
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+		return NULL;
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+	}
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+}
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+
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 static void
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 mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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 			  const struct phylink_link_state *state)
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@@ -2748,17 +2774,6 @@ unsupported:
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 		mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
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 }
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-static void
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-mt753x_phylink_mac_an_restart(struct dsa_switch *ds, int port)
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-{
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-	struct mt7530_priv *priv = ds->priv;
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-
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-	if (!priv->info->mac_pcs_an_restart)
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-		return;
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-
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-	priv->info->mac_pcs_an_restart(ds, port);
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-}
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-
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 static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
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 					 unsigned int mode,
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 					 phy_interface_t interface)
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@@ -2768,16 +2783,13 @@ static void mt753x_phylink_mac_link_down
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 	mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
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 }
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-static void mt753x_mac_pcs_link_up(struct dsa_switch *ds, int port,
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-				   unsigned int mode, phy_interface_t interface,
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-				   int speed, int duplex)
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+static void mt753x_phylink_pcs_link_up(struct phylink_pcs *pcs,
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+				       unsigned int mode,
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+				       phy_interface_t interface,
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+				       int speed, int duplex)
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 {
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-	struct mt7530_priv *priv = ds->priv;
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-
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-	if (!priv->info->mac_pcs_link_up)
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-		return;
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-
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-	priv->info->mac_pcs_link_up(ds, port, mode, interface, speed, duplex);
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+	if (pcs->ops->pcs_link_up)
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+		pcs->ops->pcs_link_up(pcs, mode, interface, speed, duplex);
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 }
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 static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
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@@ -2790,8 +2802,6 @@ static void mt753x_phylink_mac_link_up(s
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 	struct mt7530_priv *priv = ds->priv;
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 	u32 mcr;
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-	mt753x_mac_pcs_link_up(ds, port, mode, interface, speed, duplex);
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-
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 	mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
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 	/* MT753x MAC works in 1G full duplex mode for all up-clocked
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@@ -2869,6 +2879,8 @@ mt7531_cpu_port_config(struct dsa_switch
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 		return ret;
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 	mt7530_write(priv, MT7530_PMCR_P(port),
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 		     PMCR_CPU_PORT_SETTING(priv->id));
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+	mt753x_phylink_pcs_link_up(&priv->pcs[port].pcs, MLO_AN_FIXED,
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+				   interface, speed, DUPLEX_FULL);
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 	mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL,
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 				   speed, DUPLEX_FULL, true, true);
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@@ -2908,16 +2920,13 @@ mt753x_phylink_validate(struct dsa_switc
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 	linkmode_and(state->advertising, state->advertising, mask);
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 }
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-static int
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-mt7530_phylink_mac_link_state(struct dsa_switch *ds, int port,
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-			      struct phylink_link_state *state)
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+static void mt7530_pcs_get_state(struct phylink_pcs *pcs,
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+				 struct phylink_link_state *state)
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 {
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-	struct mt7530_priv *priv = ds->priv;
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+	struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
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+	int port = pcs_to_mt753x_pcs(pcs)->port;
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 	u32 pmsr;
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-	if (port < 0 || port >= MT7530_NUM_PORTS)
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-		return -EINVAL;
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-
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 	pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
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 	state->link = (pmsr & PMSR_LINK);
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@@ -2944,8 +2953,6 @@ mt7530_phylink_mac_link_state(struct dsa
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 		state->pause |= MLO_PAUSE_RX;
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 	if (pmsr & PMSR_TX_FC)
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 		state->pause |= MLO_PAUSE_TX;
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-
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-	return 1;
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 }
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 static int
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@@ -2987,32 +2994,49 @@ mt7531_sgmii_pcs_get_state_an(struct mt7
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 	return 0;
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 }
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-static int
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-mt7531_phylink_mac_link_state(struct dsa_switch *ds, int port,
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-			      struct phylink_link_state *state)
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+static void mt7531_pcs_get_state(struct phylink_pcs *pcs,
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+				 struct phylink_link_state *state)
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 {
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-	struct mt7530_priv *priv = ds->priv;
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+	struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
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+	int port = pcs_to_mt753x_pcs(pcs)->port;
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 	if (state->interface == PHY_INTERFACE_MODE_SGMII)
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-		return mt7531_sgmii_pcs_get_state_an(priv, port, state);
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-
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-	return -EOPNOTSUPP;
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+		mt7531_sgmii_pcs_get_state_an(priv, port, state);
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+	else
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+		state->link = false;
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 }
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-static int
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-mt753x_phylink_mac_link_state(struct dsa_switch *ds, int port,
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-			      struct phylink_link_state *state)
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+static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
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+			     phy_interface_t interface,
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+			     const unsigned long *advertising,
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+			     bool permit_pause_to_mac)
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 {
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-	struct mt7530_priv *priv = ds->priv;
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+	return 0;
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+}
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-	return priv->info->mac_port_get_state(ds, port, state);
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+static void mt7530_pcs_an_restart(struct phylink_pcs *pcs)
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+{
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 }
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+static const struct phylink_pcs_ops mt7530_pcs_ops = {
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+	.pcs_get_state = mt7530_pcs_get_state,
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+	.pcs_config = mt753x_pcs_config,
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+	.pcs_an_restart = mt7530_pcs_an_restart,
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+};
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+
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+static const struct phylink_pcs_ops mt7531_pcs_ops = {
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+	.pcs_get_state = mt7531_pcs_get_state,
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+	.pcs_config = mt753x_pcs_config,
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+	.pcs_an_restart = mt7531_pcs_an_restart,
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+	.pcs_link_up = mt7531_pcs_link_up,
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+};
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+
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 static int
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 mt753x_setup(struct dsa_switch *ds)
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 {
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 	struct mt7530_priv *priv = ds->priv;
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 	int ret = priv->info->sw_setup(ds);
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+	int i;
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 	if (ret)
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 		return ret;
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@@ -3025,6 +3049,13 @@ mt753x_setup(struct dsa_switch *ds)
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 	if (ret && priv->irq)
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 		mt7530_free_irq_common(priv);
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+	/* Initialise the PCS devices */
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+	for (i = 0; i < priv->ds->num_ports; i++) {
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+		priv->pcs[i].pcs.ops = priv->info->pcs_ops;
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+		priv->pcs[i].priv = priv;
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+		priv->pcs[i].port = i;
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+	}
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+
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 	return ret;
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 }
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@@ -3086,9 +3117,8 @@ static const struct dsa_switch_ops mt753
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 	.port_mirror_del	= mt753x_port_mirror_del,
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 	.phylink_get_caps	= mt753x_phylink_get_caps,
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 	.phylink_validate	= mt753x_phylink_validate,
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-	.phylink_mac_link_state	= mt753x_phylink_mac_link_state,
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+	.phylink_mac_select_pcs	= mt753x_phylink_mac_select_pcs,
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 	.phylink_mac_config	= mt753x_phylink_mac_config,
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-	.phylink_mac_an_restart	= mt753x_phylink_mac_an_restart,
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 	.phylink_mac_link_down	= mt753x_phylink_mac_link_down,
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 	.phylink_mac_link_up	= mt753x_phylink_mac_link_up,
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 	.get_mac_eee		= mt753x_get_mac_eee,
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@@ -3098,36 +3128,34 @@ static const struct dsa_switch_ops mt753
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 static const struct mt753x_info mt753x_table[] = {
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 	[ID_MT7621] = {
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 		.id = ID_MT7621,
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+		.pcs_ops = &mt7530_pcs_ops,
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 		.sw_setup = mt7530_setup,
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 		.phy_read = mt7530_phy_read,
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 		.phy_write = mt7530_phy_write,
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 		.pad_setup = mt7530_pad_clk_setup,
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 		.mac_port_get_caps = mt7530_mac_port_get_caps,
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-		.mac_port_get_state = mt7530_phylink_mac_link_state,
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 		.mac_port_config = mt7530_mac_config,
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 	},
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 	[ID_MT7530] = {
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 		.id = ID_MT7530,
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+		.pcs_ops = &mt7530_pcs_ops,
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 		.sw_setup = mt7530_setup,
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 		.phy_read = mt7530_phy_read,
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 		.phy_write = mt7530_phy_write,
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 		.pad_setup = mt7530_pad_clk_setup,
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 		.mac_port_get_caps = mt7530_mac_port_get_caps,
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-		.mac_port_get_state = mt7530_phylink_mac_link_state,
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 		.mac_port_config = mt7530_mac_config,
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 	},
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 	[ID_MT7531] = {
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 		.id = ID_MT7531,
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+		.pcs_ops = &mt7531_pcs_ops,
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 		.sw_setup = mt7531_setup,
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 		.phy_read = mt7531_ind_phy_read,
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 		.phy_write = mt7531_ind_phy_write,
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 		.pad_setup = mt7531_pad_setup,
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 		.cpu_port_config = mt7531_cpu_port_config,
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 		.mac_port_get_caps = mt7531_mac_port_get_caps,
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-		.mac_port_get_state = mt7531_phylink_mac_link_state,
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 		.mac_port_config = mt7531_mac_config,
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-		.mac_pcs_an_restart = mt7531_sgmii_restart_an,
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-		.mac_pcs_link_up = mt7531_sgmii_link_up_force,
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 	},
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 };
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@@ -3185,7 +3213,7 @@ mt7530_probe(struct mdio_device *mdiodev
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 	if (!priv->info->sw_setup || !priv->info->pad_setup ||
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 	    !priv->info->phy_read || !priv->info->phy_write ||
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 	    !priv->info->mac_port_get_caps ||
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-	    !priv->info->mac_port_get_state || !priv->info->mac_port_config)
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+	    !priv->info->mac_port_config)
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 		return -EINVAL;
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 	priv->id = priv->info->id;
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -741,6 +741,12 @@ static const char *p5_intf_modes(unsigne
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 struct mt7530_priv;
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+struct mt753x_pcs {
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+	struct phylink_pcs pcs;
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+	struct mt7530_priv *priv;
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+	int port;
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+};
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+
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 /* struct mt753x_info -	This is the main data structure for holding the specific
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  *			part for each supported device
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  * @sw_setup:		Holding the handler to a device initialization
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@@ -752,18 +758,14 @@ struct mt7530_priv;
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  *			port
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  * @mac_port_validate:	Holding the way to set addition validate type for a
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  *			certan MAC port
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						|
- * @mac_port_get_state: Holding the way getting the MAC/PCS state for a certain
 | 
						|
- *			MAC port
 | 
						|
  * @mac_port_config:	Holding the way setting up the PHY attribute to a
 | 
						|
  *			certain MAC port
 | 
						|
- * @mac_pcs_an_restart	Holding the way restarting PCS autonegotiation for a
 | 
						|
- *			certain MAC port
 | 
						|
- * @mac_pcs_link_up:	Holding the way setting up the PHY attribute to the pcs
 | 
						|
- *			of the certain MAC port
 | 
						|
  */
 | 
						|
 struct mt753x_info {
 | 
						|
 	enum mt753x_id id;
 | 
						|
 
 | 
						|
+	const struct phylink_pcs_ops *pcs_ops;
 | 
						|
+
 | 
						|
 	int (*sw_setup)(struct dsa_switch *ds);
 | 
						|
 	int (*phy_read)(struct mt7530_priv *priv, int port, int regnum);
 | 
						|
 	int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);
 | 
						|
@@ -774,15 +776,9 @@ struct mt753x_info {
 | 
						|
 	void (*mac_port_validate)(struct dsa_switch *ds, int port,
 | 
						|
 				  phy_interface_t interface,
 | 
						|
 				  unsigned long *supported);
 | 
						|
-	int (*mac_port_get_state)(struct dsa_switch *ds, int port,
 | 
						|
-				  struct phylink_link_state *state);
 | 
						|
 	int (*mac_port_config)(struct dsa_switch *ds, int port,
 | 
						|
 			       unsigned int mode,
 | 
						|
 			       phy_interface_t interface);
 | 
						|
-	void (*mac_pcs_an_restart)(struct dsa_switch *ds, int port);
 | 
						|
-	void (*mac_pcs_link_up)(struct dsa_switch *ds, int port,
 | 
						|
-				unsigned int mode, phy_interface_t interface,
 | 
						|
-				int speed, int duplex);
 | 
						|
 };
 | 
						|
 
 | 
						|
 /* struct mt7530_priv -	This is the main data structure for holding the state
 | 
						|
@@ -824,6 +820,7 @@ struct mt7530_priv {
 | 
						|
 	u8			mirror_tx;
 | 
						|
 
 | 
						|
 	struct mt7530_port	ports[MT7530_NUM_PORTS];
 | 
						|
+	struct mt753x_pcs	pcs[MT7530_NUM_PORTS];
 | 
						|
 	/* protect among processes for registers access*/
 | 
						|
 	struct mutex reg_mutex;
 | 
						|
 	int irq;
 |